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authorArnd Bergmann <arnd@arndb.de>2014-11-28 17:01:57 +0300
committerArnd Bergmann <arnd@arndb.de>2014-11-28 17:01:57 +0300
commit6b7f0570b1f0a7f65d90d6b5d4ddf84c2a13e91b (patch)
treef685bc0bda07a9036f76c4e9c342eacb6354fe8a /Documentation
parentea4409cc44e8f0f36182fcc22eb48b15ed61dd16 (diff)
parent96acf9dfe1ba59e99eafcf26478118edd195d924 (diff)
downloadlinux-6b7f0570b1f0a7f65d90d6b5d4ddf84c2a13e91b.tar.xz
Merge tag 'imx-dt-3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt
Pull "The i.MX device tree changes for 3.19" from Shawn Guo: - Device additions for board vf610-colibri, pwm, backlight, I2C, RTC, ADC etc. - Update i.MX6 phyFLEX board to include PCIe, CAN and audio support - Improve SSI clocks description for i.MX5 platforms - Add ENET2 support for imx6sx-sdb board - Add device tree source for LS1021A SoC, board QDS and TWR - Enable cpufreq support for i.MX53 - Enable VPU device support for i.MX6QDL - Enable poweroff support for i.MX6 SoCs - Add support for TBS2910 Matrix ARM mini PC which is built on i.MX6Q - Create generic base device trees for Vybrid and add support for Colibri VF50 Note: the change set is built on top of imx-soc-3.19 to resolve the dependency that "ARM: dts: imx53: add cpufreq-dt support" uses the clock define IMX5_CLK_ARM that is added by "ARM: imx53: clk: add ARM clock". * tag 'imx-dt-3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (51 commits) ARM: dts: imx6q-tbs2910: Enable snvs-poweroff ARM: dts: imx6: add pm_power_off support for i.mx6 chips ARM: dts: vf-colibri: add USB regulators ARM: dts: imx6: phyFLEX: Add CAN support ARM: dts: imx6: phyFLEX: Add PCIe ARM: dts: imx6: phyFLEX: Set correct interrupt for pmic ARM: dts: imx6: phyFLEX: Enable gpmi in module file ARM: dts: imx6: phyFLEX: set nodes in alphabetical order ARM: dts: vf-colibri-eval-v3.dts: Enable ST-M41T0M6 RTC ARM: dts: vf-colibri: Add I2C support ARM: dts: imx6qdl: Enable CODA960 VPU ARM: dts: imx6q-tbs2910: Remove unneeded 'fsl,mode' property ARM: dts: vf610: enable USB misc/phy nodes where necessary ARM: dts: vf610: use new GPIO support ARM: dts: pbab01: enable I2S audio on phyFLEX-i.MX6 boards ARM: dts: pbab01: move i2c pins and frequency configuration into pfla02 ARM: dts: vf500-colibri: add Colibri VF50 support ARM: dts: vf610: create generic base device trees ARM: dts: vf610: assign oscillator to clock module dt-bindings: arm: add Freescale LS1021A SoC device tree binding ... Signed-off-by; Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/arm/fsl.txt38
-rw-r--r--Documentation/devicetree/bindings/clock/vf610-clock.txt15
-rw-r--r--Documentation/devicetree/bindings/power_supply/imx-snvs-poweroff.txt23
-rw-r--r--Documentation/devicetree/bindings/vendor-prefixes.txt1
4 files changed, 77 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/arm/fsl.txt b/Documentation/devicetree/bindings/arm/fsl.txt
index e935d7d4ac43..4e8b7df7fc62 100644
--- a/Documentation/devicetree/bindings/arm/fsl.txt
+++ b/Documentation/devicetree/bindings/arm/fsl.txt
@@ -74,3 +74,41 @@ Required root node properties:
i.MX6q generic board
Required root node properties:
- compatible = "fsl,imx6q";
+
+
+Freescale LS1021A Platform Device Tree Bindings
+------------------------------------------------
+
+Required root node compatible properties:
+ - compatible = "fsl,ls1021a";
+
+Freescale LS1021A SoC-specific Device Tree Bindings
+-------------------------------------------
+
+Freescale SCFG
+ SCFG is the supplemental configuration unit, that provides SoC specific
+configuration and status registers for the chip. Such as getting PEX port
+status.
+ Required properties:
+ - compatible: should be "fsl,ls1021a-scfg"
+ - reg: should contain base address and length of SCFG memory-mapped registers
+
+Example:
+ scfg: scfg@1570000 {
+ compatible = "fsl,ls1021a-scfg";
+ reg = <0x0 0x1570000 0x0 0x10000>;
+ };
+
+Freescale DCFG
+ DCFG is the device configuration unit, that provides general purpose
+configuration and status for the device. Such as setting the secondary
+core start address and release the secondary core from holdoff and startup.
+ Required properties:
+ - compatible: should be "fsl,ls1021a-dcfg"
+ - reg : should contain base address and length of DCFG memory-mapped registers
+
+Example:
+ dcfg: dcfg@1ee0000 {
+ compatible = "fsl,ls1021a-dcfg";
+ reg = <0x0 0x1ee0000 0x0 0x10000>;
+ };
diff --git a/Documentation/devicetree/bindings/clock/vf610-clock.txt b/Documentation/devicetree/bindings/clock/vf610-clock.txt
index c80863d344ac..63f9f1ac3439 100644
--- a/Documentation/devicetree/bindings/clock/vf610-clock.txt
+++ b/Documentation/devicetree/bindings/clock/vf610-clock.txt
@@ -5,6 +5,19 @@ Required properties:
- reg: Address and length of the register set
- #clock-cells: Should be <1>
+Optional properties:
+- clocks: list of clock identifiers which are external input clocks to the
+ given clock controller. Please refer the next section to find
+ the input clocks for a given controller.
+- clock-names: list of names of clocks which are exteral input clocks to the
+ given clock controller.
+
+Input clocks for top clock controller:
+ - sxosc (external crystal oscillator 32KHz, recommended)
+ - fxosc (external crystal oscillator 24MHz, recommended)
+ - audio_ext
+ - enet_ext
+
The clock consumer should specify the desired clock by having the clock
ID in its "clocks" phandle cell. See include/dt-bindings/clock/vf610-clock.h
for the full list of VF610 clock IDs.
@@ -15,6 +28,8 @@ clks: ccm@4006b000 {
compatible = "fsl,vf610-ccm";
reg = <0x4006b000 0x1000>;
#clock-cells = <1>;
+ clocks = <&sxosc>, <&fxosc>;
+ clock-names = "sxosc", "fxosc";
};
uart1: serial@40028000 {
diff --git a/Documentation/devicetree/bindings/power_supply/imx-snvs-poweroff.txt b/Documentation/devicetree/bindings/power_supply/imx-snvs-poweroff.txt
new file mode 100644
index 000000000000..dc7c9bad63ea
--- /dev/null
+++ b/Documentation/devicetree/bindings/power_supply/imx-snvs-poweroff.txt
@@ -0,0 +1,23 @@
+i.mx6 Poweroff Driver
+
+SNVS_LPCR in SNVS module can power off the whole system by pull
+PMIC_ON_REQ low if PMIC_ON_REQ is connected with external PMIC.
+If you don't want to use PMIC_ON_REQ as power on/off control,
+please set status='disabled' to disable this driver.
+
+Required Properties:
+-compatible: "fsl,sec-v4.0-poweroff"
+-reg: Specifies the physical address of the SNVS_LPCR register
+
+Example:
+ snvs@020cc000 {
+ compatible = "fsl,sec-v4.0-mon", "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x020cc000 0x4000>;
+ .....
+ snvs_poweroff: snvs-poweroff@38 {
+ compatible = "fsl,sec-v4.0-poweroff";
+ reg = <0x38 0x4>;
+ };
+ }
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
index bfbd93e06bae..8c4a0db062cd 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.txt
+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
@@ -147,6 +147,7 @@ st STMicroelectronics
ste ST-Ericsson
stericsson ST-Ericsson
synology Synology, Inc.
+tbs TBS Technologies
thine THine Electronics, Inc.
ti Texas Instruments
tlm Trusted Logic Mobility