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authorIcenowy Zheng <icenowy@aosc.io>2018-09-16 07:34:07 +0300
committerMaxime Ripard <maxime.ripard@bootlin.com>2018-09-19 11:59:15 +0300
commit5c5b3b0ebe6d78cad645cc010d7e8fb81ccd099b (patch)
tree56ca3b1ee4a03a3f02dfb41efd8d9854048a320c /Documentation
parent69fdf4206a8ba91a277b3d50a3a05b71247635b2 (diff)
downloadlinux-5c5b3b0ebe6d78cad645cc010d7e8fb81ccd099b.tar.xz
dt-bindings: sun4i-drm: add compatible for R40 HDMI PHY
The Allwinner R40 HDMI PHY is currently the only one that seems to be able to select between two PLL inputs. Add a compatible string for it, and the pll-1 clock input definition. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180916043409.62374-3-icenowy@aosc.io
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt5
1 files changed, 3 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
index 0bbb5d47f228..22d6dda587c5 100644
--- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
+++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
@@ -107,6 +107,7 @@ Required properties:
- compatible: value must be one of:
* allwinner,sun8i-a83t-hdmi-phy
* allwinner,sun8i-h3-hdmi-phy
+ * allwinner,sun8i-r40-hdmi-phy
* allwinner,sun50i-a64-hdmi-phy
- reg: base address and size of memory-mapped region
- clocks: phandles to the clocks feeding the HDMI PHY
@@ -116,9 +117,9 @@ Required properties:
- resets: phandle to the reset controller driving the PHY
- reset-names: must be "phy"
-H3 and A64 HDMI PHY require additional clocks:
+H3, A64 and R40 HDMI PHY require additional clocks:
- pll-0: parent of phy clock
- - pll-1: second possible phy clock parent (A64 only)
+ - pll-1: second possible phy clock parent (A64/R40 only)
TV Encoder
----------