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| author | Emil Renner Berthing <kernel@esmil.dk> | 2021-09-19 15:34:34 +0300 |
|---|---|---|
| committer | jianlong.huang <jianlong.huang@starfivetech.com> | 2022-04-21 03:12:42 +0300 |
| commit | 482254dc12a83f1073e7a7dc3078d4cec404e403 (patch) | |
| tree | bc160bda9acc214ae61d0ea935a05a15256fb48f /Documentation | |
| parent | d28c8af867bf74d0b213e93075a477abc9c82fae (diff) | |
| download | linux-482254dc12a83f1073e7a7dc3078d4cec404e403.tar.xz | |
dt-bindings: reset: Add Starfive JH7100 reset bindings
commit d7d456a5201d2e707318bbdc4fb69a3407eed29e upstream.
Add bindings for the reset controller on the JH7100 RISC-V SoC by
StarFive Ltd. This is a test chip for their upcoming JH7110 SoC.
Reviewed-by: Geert Uytterhoeven <geert@linux-m68k.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/devicetree/bindings/reset/starfive,jh7100-reset.yaml | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/reset/starfive,jh7100-reset.yaml b/Documentation/devicetree/bindings/reset/starfive,jh7100-reset.yaml new file mode 100644 index 000000000000..300359a5e14b --- /dev/null +++ b/Documentation/devicetree/bindings/reset/starfive,jh7100-reset.yaml @@ -0,0 +1,38 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/reset/starfive,jh7100-reset.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: StarFive JH7100 SoC Reset Controller Device Tree Bindings + +maintainers: + - Emil Renner Berthing <kernel@esmil.dk> + +properties: + compatible: + enum: + - starfive,jh7100-reset + + reg: + maxItems: 1 + + "#reset-cells": + const: 1 + +required: + - compatible + - reg + - "#reset-cells" + +additionalProperties: false + +examples: + - | + reset-controller@11840000 { + compatible = "starfive,jh7100-reset"; + reg = <0x11840000 0x10000>; + #reset-cells = <1>; + }; + +... |