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authorWill Deacon <will.deacon@arm.com>2012-12-19 18:01:08 +0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2012-12-20 14:41:56 +0400
commitd056a699dd3d9366dd3b4d9996e7848209199cda (patch)
tree158528d22412216c33487e57d40f76d64884a8be /Documentation/percpu-rw-semaphore.txt
parent7bf9b7bef881aac820bf1f2e9951a17b09bd7e04 (diff)
downloadlinux-d056a699dd3d9366dd3b4d9996e7848209199cda.tar.xz
ARM: 7606/1: cache: flush to LoUU instead of LoUIS on uniprocessor CPUs
flush_cache_louis flushes the D-side caches to the point of unification inner-shareable. On uniprocessor CPUs, this is defined as zero and therefore no flushing will take place. Rather than invent a new interface for UP systems, instead use our SMP_ON_UP patching code to read the LoUU from the CLIDR instead. Cc: <stable@vger.kernel.org> Cc: Lorenzo Pieralisi <Lorenzo.Pieralisi@arm.com> Tested-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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