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authorStephen Warren <swarren@nvidia.com>2013-03-05 04:10:20 +0400
committerMark Brown <broonie@opensource.wolfsonmicro.com>2013-03-05 06:42:11 +0400
commit0af18c5cc9403999bb189f825b816f7fc80fc0ee (patch)
treeec65734228968d4948dd50b9551aaea799058558 /Documentation/oops-tracing.txt
parent6dbe51c251a327e012439c4772097a13df43c5b8 (diff)
downloadlinux-0af18c5cc9403999bb189f825b816f7fc80fc0ee.tar.xz
ASoC: tegra: fix I2S bit count mask
This register field is 11 bits wide, not 15 bits wide. Given the way this value is currently, used, this patch has no practical effect. However, it's still best if the value is correct. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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