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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2022-08-12 19:44:23 +0300 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2022-08-12 19:44:23 +0300 |
| commit | 999324f58c41262f5b64d04b7ac54e8f79b019fd (patch) | |
| tree | 4aa403e5485bef11d1187428adcf20e67fa212f9 /Documentation/loongarch/introduction.rst | |
| parent | f7cdaeeab8caf8e42fc176cdb272944e036ad998 (diff) | |
| parent | 715355922212a3be8bfe5a94b5707a045ac6bf00 (diff) | |
| download | linux-999324f58c41262f5b64d04b7ac54e8f79b019fd.tar.xz | |
Merge tag 'loongarch-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
Pull LoongArch updates from Huacai Chen:
- Optimise getcpu() with vDSO
- PCI enablement on top of pci & irqchip changes
- Stack unwinder and stack trace support
- Some bug fixes and build error fixes
- Update the default config file
* tag 'loongarch-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson:
docs/zh_CN/LoongArch: Add I14 description
docs/LoongArch: Add I14 description
LoongArch: Update Loongson-3 default config file
LoongArch: Add USER_STACKTRACE support
LoongArch: Add STACKTRACE support
LoongArch: Add prologue unwinder support
LoongArch: Add guess unwinder support
LoongArch: Add vDSO syscall __vdso_getcpu()
LoongArch: Add PCI controller support
LoongArch: Parse MADT to get multi-processor information
LoongArch: Jump to the link address before enable PG
LoongArch: Requires __force attributes for any casts
LoongArch: Fix unsigned comparison with less than zero
LoongArch: Adjust arch/loongarch/Kconfig
LoongArch: cpuinfo: Fix a warning for CONFIG_CPUMASK_OFFSTACK
Diffstat (limited to 'Documentation/loongarch/introduction.rst')
| -rw-r--r-- | Documentation/loongarch/introduction.rst | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/loongarch/introduction.rst b/Documentation/loongarch/introduction.rst index 216b3f390e80..6c9160c4e9be 100644 --- a/Documentation/loongarch/introduction.rst +++ b/Documentation/loongarch/introduction.rst @@ -221,7 +221,7 @@ I26 Opcode + I26L + I26H =========== ========================== Rd is the destination register operand, while Rj, Rk and Ra ("a" stands for -"additional") are the source register operands. I8/I12/I16/I21/I26 are +"additional") are the source register operands. I8/I12/I14/I16/I21/I26 are immediate operands of respective width. The longer I21 and I26 are stored in separate higher and lower parts in the instruction word, denoted by the "L" and "H" suffixes. |