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authorDaniel W. S. Almeida <dwlsalmeida@gmail.com>2019-11-22 06:47:02 +0300
committerLinus Walleij <linus.walleij@linaro.org>2019-11-22 15:58:55 +0300
commit4e29b70d54376f795285bc337c9ebf7439e374c6 (patch)
tree2995ec341688ad398e06c33418f0dd8287b2dab9 /Documentation/driver-api/gpio
parent808b9931d5a06760315c0dd02519da78cb944d8e (diff)
downloadlinux-4e29b70d54376f795285bc337c9ebf7439e374c6.tar.xz
Documentation: gpio: driver.rst: Fix warnings
Fix warnings due to incorrect rst markup. Also improved the presentation a little without changing the underlying content. Signed-off-by: Daniel W. S. Almeida <dwlsalmeida@gmail.com> Link: https://lore.kernel.org/r/20191122034702.58563-1-dwlsalmeida@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'Documentation/driver-api/gpio')
-rw-r--r--Documentation/driver-api/gpio/driver.rst21
1 files changed, 12 insertions, 9 deletions
diff --git a/Documentation/driver-api/gpio/driver.rst b/Documentation/driver-api/gpio/driver.rst
index 18dca55eddfd..10ef357ef658 100644
--- a/Documentation/driver-api/gpio/driver.rst
+++ b/Documentation/driver-api/gpio/driver.rst
@@ -5,7 +5,7 @@ GPIO Driver Interface
This document serves as a guide for writers of GPIO chip drivers.
Each GPIO controller driver needs to include the following header, which defines
-the structures used to define a GPIO driver:
+the structures used to define a GPIO driver::
#include <linux/gpio/driver.h>
@@ -398,12 +398,15 @@ provided. A big portion of overhead code will be managed by gpiolib,
under the assumption that your interrupts are 1-to-1-mapped to the
GPIO line index:
- GPIO line offset Hardware IRQ
- 0 0
- 1 1
- 2 2
- ... ...
- ngpio-1 ngpio-1
+.. csv-table::
+ :header: GPIO line offset, Hardware IRQ
+
+ 0,0
+ 1,1
+ 2,2
+ ...,...
+ ngpio-1, ngpio-1
+
If some GPIO lines do not have corresponding IRQs, the bitmask valid_mask
and the flag need_valid_mask in gpio_irq_chip can be used to mask off some
@@ -413,7 +416,7 @@ The preferred way to set up the helpers is to fill in the
struct gpio_irq_chip inside struct gpio_chip before adding the gpio_chip.
If you do this, the additional irq_chip will be set up by gpiolib at the
same time as setting up the rest of the GPIO functionality. The following
-is a typical example of a cascaded interrupt handler using gpio_irq_chip:
+is a typical example of a cascaded interrupt handler using gpio_irq_chip::
.. code-block:: c
@@ -450,7 +453,7 @@ is a typical example of a cascaded interrupt handler using gpio_irq_chip:
return devm_gpiochip_add_data(dev, &g->gc, g);
The helper support using hierarchical interrupt controllers as well.
-In this case the typical set-up will look like this:
+In this case the typical set-up will look like this::
.. code-block:: c