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authorChaotian Jing <chaotian.jing@mediatek.com>2018-09-29 05:29:55 +0300
committerUlf Hansson <ulf.hansson@linaro.org>2018-10-08 13:53:24 +0300
commit258bac4a61af9c4e7bc045ce2a17c9eb8c5fd9a5 (patch)
tree88bbce0cd7ca588b83c2f2d16b9fc84ff7bd1810 /Documentation/devicetree
parent716b717ac07de239c6ad7bd3c38f2ef979280595 (diff)
downloadlinux-258bac4a61af9c4e7bc045ce2a17c9eb8c5fd9a5.tar.xz
mmc: mediatek: add bus_clk control
when gate MSDC0_HCLK, access register will hang, even the MSDC driver will never accessing register after HCLK was gated, but for safety, need gate the bus_clk(which used to access register) too. Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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