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| author | Jianlong Huang <jianlong.huang@starfivetech.com> | 2022-08-25 11:30:11 +0300 |
|---|---|---|
| committer | Jianlong Huang <jianlong.huang@starfivetech.com> | 2022-08-25 11:37:39 +0300 |
| commit | e47b60eae9846b85107ae2f7d743da95b26ef28a (patch) | |
| tree | 113c4f06a9fc4477cdb2eb5e667107f760118367 /Documentation/devicetree | |
| parent | 86a842cd55e10a2499ee593ee84a81ba83f53f12 (diff) | |
| download | linux-e47b60eae9846b85107ae2f7d743da95b26ef28a.tar.xz | |
dt-bindings: pinctrl: Add bindings for StarFive JH7110 pinctrl
Add bindings for StarFive JH7110 pinctrl
Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com>
Diffstat (limited to 'Documentation/devicetree')
| -rw-r--r-- | Documentation/devicetree/bindings/pinctrl/starfive,jh7110-pinctrl.yaml | 77 |
1 files changed, 77 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/pinctrl/starfive,jh7110-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/starfive,jh7110-pinctrl.yaml new file mode 100644 index 000000000000..6bb0b1d3f715 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/starfive,jh7110-pinctrl.yaml @@ -0,0 +1,77 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/starfive,jh7110-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: StarFive JH7110 Pin Controller Device Tree Bindings + +description: | + Bindings for the JH7110 RISC-V SoC from StarFive Ltd. + +maintainers: + - Jianlong Huang <jianlong.huang@starfivetech.com> + +properties: + compatible: + enum: + - starfive,jh7110-sys-pinctrl + - starfive,jh7110-aon-pinctrl + + reg: + minItems: 2 + maxItems: 2 + + reg-names: + items: + - const: control + + clocks: + maxItems: 1 + + resets: + maxItems: 1 + + "#gpio-cells": + const: 2 + + interrupts: + maxItems: 1 + description: The GPIO parent interrupt. + + interrupt-controller: true + + "#interrupt-cells": + const: 2 + + ngpios: + enum: + - 64 + - 4 + +required: + - compatible + - reg + - reg-names + - clocks + - "#gpio-cells" + - interrupts + - interrupt-controller + - "#interrupt-cells" + +examples: + - | + gpio: gpio@13040000 { + compatible = "starfive,jh7110-sys-pinctrl"; + reg = <0x0 0x13040000 0x0 0x10000>; + reg-names = "control"; + clocks = <&clkgen JH7110_SYS_IOMUX_PCLK>; + resets = <&rstgen RSTN_U0_SYS_IOMUX_PRESETN>; + interrupts = <86>; + interrupt-controller; + #gpio-cells = <2>; + ngpios = <64>; + status = "okay"; + }; + +... |