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authorShubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>2018-07-21 14:49:07 +0300
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2018-08-02 11:08:44 +0300
commitbfbf2de2c9f467219b472e99c303449634fc3186 (patch)
tree608899f4d53eeeb8664799f68cf0c955c2c96b66 /Documentation/devicetree
parenta3a10614ca0fce423f80821881cfeb088f152d24 (diff)
downloadlinux-bfbf2de2c9f467219b472e99c303449634fc3186.tar.xz
dt-bindings: serial: Add binding for uartlite
The uartlite devicetree binding was missed out. Add the binding documentation for uartlite that is already in use. Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'Documentation/devicetree')
-rw-r--r--Documentation/devicetree/bindings/serial/xlnx,opb-uartlite.txt23
1 files changed, 23 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/serial/xlnx,opb-uartlite.txt b/Documentation/devicetree/bindings/serial/xlnx,opb-uartlite.txt
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+++ b/Documentation/devicetree/bindings/serial/xlnx,opb-uartlite.txt
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+Xilinx Axi Uartlite controller Device Tree Bindings
+---------------------------------------------------------
+
+Required properties:
+- compatible : Can be either of
+ "xlnx,xps-uartlite-1.00.a"
+ "xlnx,opb-uartlite-1.00.b"
+- reg : Physical base address and size of the Axi Uartlite
+ registers map.
+- interrupts : Should contain the UART controller interrupt.
+
+Optional properties:
+- port-number : Set Uart port number
+- clock-names : Should be "s_axi_aclk"
+- clocks : Input clock specifier. Refer to common clock bindings.
+
+Example:
+serial@800c0000 {
+ compatible = "xlnx,xps-uartlite-1.00.a";
+ reg = <0x0 0x800c0000 0x10000>;
+ interrupts = <0x0 0x6e 0x1>;
+ port-number = <0>;
+};