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authorGeert Uytterhoeven <geert+renesas@glider.be>2017-03-20 19:46:22 +0300
committerGeert Uytterhoeven <geert+renesas@glider.be>2017-05-24 11:19:38 +0300
commit4013047a65b376b960a2144b3d125944c8c280bc (patch)
treec795e04c270a2261dc76d7a92f1d9fd946452236 /Documentation/devicetree
parent80978a4be267e1783444841143cdb0f0eb40061c (diff)
downloadlinux-4013047a65b376b960a2144b3d125944c8c280bc.tar.xz
clk: renesas: cpg-mssr: Document R-Car Gen2 support
Document use of the Renesas Clock Pulse Generator / Module Standby and Software Reset DT Bindings for various member of the R-Car Gen2 family (H2, M2-W, V2H, M2-N, and E2). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'Documentation/devicetree')
-rw-r--r--Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt10
1 files changed, 8 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt b/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt
index f4f944d81308..0cd894f987a3 100644
--- a/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt
+++ b/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt
@@ -15,6 +15,11 @@ Required Properties:
- compatible: Must be one of:
- "renesas,r8a7743-cpg-mssr" for the r8a7743 SoC (RZ/G1M)
- "renesas,r8a7745-cpg-mssr" for the r8a7745 SoC (RZ/G1E)
+ - "renesas,r8a7790-cpg-mssr" for the r8a7790 SoC (R-Car H2)
+ - "renesas,r8a7791-cpg-mssr" for the r8a7791 SoC (R-Car M2-W)
+ - "renesas,r8a7792-cpg-mssr" for the r8a7792 SoC (R-Car V2H)
+ - "renesas,r8a7793-cpg-mssr" for the r8a7793 SoC (R-Car M2-N)
+ - "renesas,r8a7794-cpg-mssr" for the r8a7794 SoC (R-Car E2)
- "renesas,r8a7795-cpg-mssr" for the r8a7795 SoC (R-Car H3)
- "renesas,r8a7796-cpg-mssr" for the r8a7796 SoC (R-Car M3-W)
@@ -24,9 +29,10 @@ Required Properties:
- clocks: References to external parent clocks, one entry for each entry in
clock-names
- clock-names: List of external parent clock names. Valid names are:
- - "extal" (r8a7743, r8a7745, r8a7795, r8a7796)
+ - "extal" (r8a7743, r8a7745, r8a7790, r8a7791, r8a7792, r8a7793, r8a7794,
+ r8a7795, r8a7796)
- "extalr" (r8a7795, r8a7796)
- - "usb_extal" (r8a7743, r8a7745)
+ - "usb_extal" (r8a7743, r8a7745, r8a7790, r8a7791, r8a7793, r8a7794)
- #clock-cells: Must be 2
- For CPG core clocks, the two clock specifier cells must be "CPG_CORE"