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| author | ziv.xu <ziv.xu@starfivetech.com> | 2023-06-26 09:07:01 +0300 |
|---|---|---|
| committer | ziv.xu <ziv.xu@starfivetech.com> | 2023-06-26 09:08:42 +0300 |
| commit | 6315ecfc3bddc9ef9799d0aea89c3b860d65f00c (patch) | |
| tree | bc882e529f321a93cbab99ed3b3523f38abf91b7 /Documentation/devicetree | |
| parent | 8b0563e14962604fa233d59dc9087f26efba49d7 (diff) | |
| download | linux-6315ecfc3bddc9ef9799d0aea89c3b860d65f00c.tar.xz | |
dt-bindings: timer : Add timer for StarFive JH7110 SoC
add documentation to describe timer for StarFive JH7110 Soc
Signed-off-by: ziv.xu <ziv.xu@starfivetech.com>
Diffstat (limited to 'Documentation/devicetree')
| -rw-r--r-- | Documentation/devicetree/bindings/timer/starfive,jh7110-timers.yaml | 100 |
1 files changed, 100 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/timer/starfive,jh7110-timers.yaml b/Documentation/devicetree/bindings/timer/starfive,jh7110-timers.yaml new file mode 100644 index 000000000000..3d1798d03c57 --- /dev/null +++ b/Documentation/devicetree/bindings/timer/starfive,jh7110-timers.yaml @@ -0,0 +1,100 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/timer/starfive,jh7110-timers.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: StarFive timers bindings + +maintainers: + - samin.guo <samin.guo@starfivetech.com> + - xingyu.wu <xingyu.wu@starfivetech.com> + +properties: + compatible: + const: starfive,jh7110-timers + + reg: + maxItems: 1 + + interrupts: + items: + - description: timer channel 0 interrupt + - description: timer channel 1 interrupt + - description: timer channel 2 interrupt + - description: timer channel 3 interrupt + + interrupt-names: + items: + - const: timer0 + - const: timer1 + - const: timer2 + - const: timer3 + + clocks: + items: + - description: timer channel 0 clock + - description: timer channel 1 clock + - description: timer channel 2 clock + - description: timer channel 3 clock + - description: APB clock + + clock-names: + items: + - const: timer0 + - const: timer1 + - const: timer2 + - const: timer3 + - const: apb_clk + + resets: + items: + - description: timer channel 0 reset + - description: timer channel 1 reset + - description: timer channel 2 reset + - description: timer channel 3 reset + - description: APB reset + + reset-names: + items: + - const: timer0 + - const: timer1 + - const: timer2 + - const: timer3 + - const: apb_rst + +required: + - compatible + - reg + - interrupts + - interrupt-names + - clocks + - clock-names + - resets + - reset-names + +additionalProperties: false + +examples: + - | + timer0: timer@15200000 { + compatible = "starfive,jh7110-timers"; + reg = <0x15200000 0x10000>; + interrupts = <85>, <86>, <87> ,<88>; + interrupt-names = "timer0", "timer1", "timer2", "timer3"; + clocks = <&clkgen 125>, + <&clkgen 126>, + <&clkgen 127>, + <&clkgen 128>, + <&clkgen 129>; + clock-names = "timer0", "timer1", + "timer2", "timer3", "apb_clk"; + resets = <&rstgen 118>, + <&rstgen 119>, + <&rstgen 120>, + <&rstgen 121>, + <&rstgen 122>; + reset-names = "timer0", "timer1", + "timer2", "timer3", "apb_rst"; + }; + |