diff options
| author | John Keeping <john@metanate.com> | 2017-03-03 14:39:45 +0300 |
|---|---|---|
| committer | Sean Paul <seanpaul@chromium.org> | 2017-04-04 21:26:27 +0300 |
| commit | cc85dcde42204aa4f0df5e1cb0eeacf266b8fe79 (patch) | |
| tree | 09d2bc21c73164ee941f22ac587f5a7ccb1c2c70 /Documentation/devicetree/bindings | |
| parent | b40af4d5ba441c7ffb32d3447614b12659d381e5 (diff) | |
| download | linux-cc85dcde42204aa4f0df5e1cb0eeacf266b8fe79.tar.xz | |
dt-bindings: display: rk3288-mipi-dsi: add reset property
This reset is required in order to fully reset the internal state of the
MIPI controller.
Signed-off-by: John Keeping <john@metanate.com>
Reviewed-by: Brian Norris <briannorris@chromium.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: http://patchwork.freedesktop.org/patch/msgid/20170303113945.3bd2cbd9.john@metanate.com
Diffstat (limited to 'Documentation/devicetree/bindings')
| -rw-r--r-- | Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt b/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt index 1d722f5055ab..543b07435f4f 100644 --- a/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt +++ b/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt @@ -17,9 +17,12 @@ Required properties: Optional properties: - power-domains: a phandle to mipi dsi power domain node. +- resets: list of phandle + reset specifier pairs, as described in [3]. +- reset-names: string reset name, must be "apb". [1] Documentation/devicetree/bindings/clock/clock-bindings.txt [2] Documentation/devicetree/bindings/media/video-interfaces.txt +[3] Documentation/devicetree/bindings/reset/reset.txt Example: mipi_dsi: mipi@ff960000 { @@ -30,6 +33,8 @@ Example: interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cru SCLK_MIPI_24M>, <&cru PCLK_MIPI_DSI0>; clock-names = "ref", "pclk"; + resets = <&cru SRST_MIPIDSI0>; + reset-names = "apb"; rockchip,grf = <&grf>; status = "okay"; |