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author | Grygorii Strashko <grygorii.strashko@ti.com> | 2019-11-27 18:55:26 +0300 |
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committer | Rob Herring <robh@kernel.org> | 2019-12-11 18:07:28 +0300 |
commit | a2ce3217d3a448e5cf434026131633cf32ed2234 (patch) | |
tree | 2c416901091f4b570f743d9a9b5295518b9f5383 /Documentation/devicetree/bindings | |
parent | 71bbcd2eaf042ec3f10122e3f3b1be67dbfb1c16 (diff) | |
download | linux-a2ce3217d3a448e5cf434026131633cf32ed2234.tar.xz |
dt-bindings: net: ti: cpsw-switch: update to fix comments
After original patch was merged there were additional comments/requests
provided by Rob Herring [1]. Mostly they are related to json-schema usage,
and this patch fixes them. Also SPDX-License-Identifier has been changed to
(GPL-2.0-only OR BSD-2-Clause) as requested.
[1] https://lkml.org/lkml/2019/11/21/875
Fixes: ef63fe72f698 ("dt-bindings: net: ti: add new cpsw switch driver bindings")
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
[robh: Remove 2 more maxItems that aren't necessary]
Signed-off-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings')
-rw-r--r-- | Documentation/devicetree/bindings/net/ti,cpsw-switch.yaml | 22 |
1 files changed, 7 insertions, 15 deletions
diff --git a/Documentation/devicetree/bindings/net/ti,cpsw-switch.yaml b/Documentation/devicetree/bindings/net/ti,cpsw-switch.yaml index 81ae8cafabc1..ac8c76369a86 100644 --- a/Documentation/devicetree/bindings/net/ti,cpsw-switch.yaml +++ b/Documentation/devicetree/bindings/net/ti,cpsw-switch.yaml @@ -1,4 +1,4 @@ -# SPDX-License-Identifier: GPL-2.0 +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/net/ti,cpsw-switch.yaml# @@ -44,7 +44,6 @@ properties: description: CPSW functional clock clock-names: - maxItems: 1 items: - const: fck @@ -70,7 +69,6 @@ properties: Phandle to the system control device node which provides access to efuse IO range with MAC addresses - ethernet-ports: type: object properties: @@ -82,8 +80,6 @@ properties: patternProperties: "^port@[0-9]+$": type: object - minItems: 1 - maxItems: 2 description: CPSW external ports allOf: @@ -91,23 +87,20 @@ properties: properties: reg: - maxItems: 1 - enum: [1, 2] + items: + - enum: [1, 2] description: CPSW port number phys: - $ref: /schemas/types.yaml#definitions/phandle-array maxItems: 1 description: phandle on phy-gmii-sel PHY label: - $ref: /schemas/types.yaml#/definitions/string-array - maxItems: 1 description: label associated with this port ti,dual-emac-pvid: - $ref: /schemas/types.yaml#/definitions/uint32 - maxItems: 1 + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 minimum: 1 maximum: 1024 description: @@ -136,7 +129,6 @@ properties: description: CPTS reference clock clock-names: - maxItems: 1 items: - const: cpts @@ -201,7 +193,7 @@ examples: phys = <&phy_gmii_sel 1>; phy-handle = <ðphy0_sw>; phy-mode = "rgmii"; - ti,dual_emac_pvid = <1>; + ti,dual-emac-pvid = <1>; }; cpsw_port2: port@2 { @@ -211,7 +203,7 @@ examples: phys = <&phy_gmii_sel 2>; phy-handle = <ðphy1_sw>; phy-mode = "rgmii"; - ti,dual_emac_pvid = <2>; + ti,dual-emac-pvid = <2>; }; }; |