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| author | Zhou Yanjie <zhouyanjie@zoho.com> | 2019-07-14 06:53:51 +0300 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2019-07-30 00:39:44 +0300 |
| commit | d0d6d8364ef6b2f46c4751a50690dc7aa4994f0d (patch) | |
| tree | 20731326cd404b8e9b815555a2f4f2489266f20c /Documentation/devicetree/bindings/pinctrl | |
| parent | a0b447c18c4279cf0aa67bd62f258a01295855e7 (diff) | |
| download | linux-d0d6d8364ef6b2f46c4751a50690dc7aa4994f0d.tar.xz | |
dt-bindings: pinctrl: Add JZ4760 and JZ4760B bindings.
Add the pinctrl bindings for the JZ4760 Soc and
the JZ4760B Soc from Ingenic.
Signed-off-by: Zhou Yanjie <zhouyanjie@zoho.com>
Link: https://lore.kernel.org/r/1563076436-5338-2-git-send-email-zhouyanjie@zoho.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'Documentation/devicetree/bindings/pinctrl')
| -rw-r--r-- | Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.txt | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.txt index af20b0ec715c..a80ff685b63c 100644 --- a/Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.txt @@ -11,8 +11,8 @@ naming scheme "PxN" where x is a character identifying the GPIO port with which the pin is associated and N is an integer from 0 to 31 identifying the pin within that GPIO port. For example PA0 is the first pin in GPIO port A, and PB31 is the last pin in GPIO port B. The jz4740 contains 4 GPIO ports, PA to -PD, for a total of 128 pins. The jz4780 contains 6 GPIO ports, PA to PF, for a -total of 192 pins. +PD, for a total of 128 pins. The jz4760, the jz4770 and the jz4780 contains 6 +GPIO ports, PA to PF, for a total of 192 pins. Required properties: @@ -21,6 +21,8 @@ Required properties: - compatible: One of: - "ingenic,jz4740-pinctrl" - "ingenic,jz4725b-pinctrl" + - "ingenic,jz4760-pinctrl" + - "ingenic,jz4760b-pinctrl" - "ingenic,jz4770-pinctrl" - "ingenic,jz4780-pinctrl" - reg: Address range of the pinctrl registers. @@ -31,6 +33,7 @@ Required properties for sub-nodes (GPIO chips): - compatible: Must contain one of: - "ingenic,jz4740-gpio" + - "ingenic,jz4760-gpio" - "ingenic,jz4770-gpio" - "ingenic,jz4780-gpio" - reg: The GPIO bank number. |