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| author | Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2023-12-09 00:55:29 +0300 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2023-12-20 14:09:57 +0300 |
| commit | fc19a5644b91bdfd141b911444f5238b6dc48562 (patch) | |
| tree | 2191b3845363646683c709fdce506fc30f517543 /Documentation/devicetree/bindings/pinctrl | |
| parent | 8c0aa95bd0f885a9d87819e02bd28bc03630189d (diff) | |
| download | linux-fc19a5644b91bdfd141b911444f5238b6dc48562.tar.xz | |
dt-bindings: pinctrl: qcom,sm8550-tlmm: restrict number of interrupts
SM8550 TLMM pin controller comes with only one interrupt, so narrow
the number of interrupts previously defined in common TLMM bindings.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20231208215534.195854-5-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'Documentation/devicetree/bindings/pinctrl')
| -rw-r--r-- | Documentation/devicetree/bindings/pinctrl/qcom,sm8550-tlmm.yaml | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8550-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8550-tlmm.yaml index f789c7753a92..567e44875c29 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sm8550-tlmm.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8550-tlmm.yaml @@ -22,7 +22,9 @@ properties: reg: maxItems: 1 - interrupts: true + interrupts: + maxItems: 1 + interrupt-controller: true "#interrupt-cells": true gpio-controller: true |