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authorKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>2022-09-12 09:17:26 +0300
committerLinus Walleij <linus.walleij@linaro.org>2022-09-14 13:18:15 +0300
commitfde270ebb7eddf5aeae3e6235afdc92390d4d8f0 (patch)
treea338c7dda323af7de5cac98e25713f1e1defb509 /Documentation/devicetree/bindings/pinctrl/qcom,sm8450-pinctrl.yaml
parentd4ac2a2b7c6265156b2df6b4841e7f1117638d2b (diff)
downloadlinux-fde270ebb7eddf5aeae3e6235afdc92390d4d8f0.tar.xz
dt-bindings: pinctrl: qcom,sm8450-pinctrl: fix indentation in example
Bindings example should be indented with 4-spaces. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220912061746.6311-21-krzysztof.kozlowski@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'Documentation/devicetree/bindings/pinctrl/qcom,sm8450-pinctrl.yaml')
-rw-r--r--Documentation/devicetree/bindings/pinctrl/qcom,sm8450-pinctrl.yaml58
1 files changed, 29 insertions, 29 deletions
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-pinctrl.yaml
index d1d1c1455b3c..87347e9c5f1c 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-pinctrl.yaml
@@ -111,34 +111,34 @@ $defs:
examples:
- |
- #include <dt-bindings/interrupt-controller/arm-gic.h>
- pinctrl@f100000 {
- compatible = "qcom,sm8450-tlmm";
- reg = <0x0f100000 0x300000>;
- gpio-controller;
- #gpio-cells = <2>;
- gpio-ranges = <&tlmm 0 0 211>;
- interrupt-controller;
- #interrupt-cells = <2>;
- interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
-
- gpio-wo-subnode-state {
- pins = "gpio1";
- function = "gpio";
- };
-
- uart-w-subnodes-state {
- rx-pins {
- pins = "gpio26";
- function = "qup7";
- bias-pull-up;
- };
-
- tx-pins {
- pins = "gpio27";
- function = "qup7";
- bias-disable;
- };
- };
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ pinctrl@f100000 {
+ compatible = "qcom,sm8450-tlmm";
+ reg = <0x0f100000 0x300000>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&tlmm 0 0 211>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
+
+ gpio-wo-state {
+ pins = "gpio1";
+ function = "gpio";
};
+
+ uart-w-state {
+ rx-pins {
+ pins = "gpio26";
+ function = "qup7";
+ bias-pull-up;
+ };
+
+ tx-pins {
+ pins = "gpio27";
+ function = "qup7";
+ bias-disable;
+ };
+ };
+ };
...