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author | Chunfeng Yun <chunfeng.yun@mediatek.com> | 2021-08-17 12:19:39 +0300 |
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committer | Vinod Koul <vkoul@kernel.org> | 2021-08-17 13:21:58 +0300 |
commit | c01608b3b46bfd5285117ab2c66df7cd59b7c67d (patch) | |
tree | 6d4cc41010eb08a8c6f3452c8fbe440b5efeef3f /Documentation/devicetree/bindings/phy/mediatek,tphy.yaml | |
parent | 48ac6085bdfcf568e24c1efd45615ec3d5d3545b (diff) | |
download | linux-c01608b3b46bfd5285117ab2c66df7cd59b7c67d.tar.xz |
dt-bindings: phy: mediatek: tphy: support type switch by pericfg
Add support type switch by pericfg register between USB3, PCIe,
SATA, SGMII, this is used to replace the way through efuse or
jumper.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/1629191987-20774-1-git-send-email-chunfeng.yun@mediatek.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/phy/mediatek,tphy.yaml')
-rw-r--r-- | Documentation/devicetree/bindings/phy/mediatek,tphy.yaml | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml b/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml index 838852cb8527..9e6c0f43f1c6 100644 --- a/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml +++ b/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml @@ -201,6 +201,22 @@ patternProperties: Specify the flag to enable BC1.2 if support it type: boolean + mediatek,syscon-type: + $ref: /schemas/types.yaml#/definitions/phandle-array + maxItems: 1 + description: + A phandle to syscon used to access the register of type switch, + the field should always be 3 cells long. + items: + items: + - description: + The first cell represents a phandle to syscon + - description: + The second cell represents the register offset + - description: + The third cell represents the index of config segment + enum: [0, 1, 2, 3] + required: - reg - "#phy-cells" |