diff options
| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2021-10-01 15:13:20 +0300 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2021-10-02 16:13:38 +0300 |
| commit | 63b1bae940a9c93232b9e7b0eb5b1e125303f893 (patch) | |
| tree | 537f0386f226a5723e074fca94307874482a0e3d /Documentation/devicetree/bindings/net/renesas,ether.yaml | |
| parent | 1643771eeb2db9b487cbbde12e2a3f6ed0171490 (diff) | |
| download | linux-63b1bae940a9c93232b9e7b0eb5b1e125303f893.tar.xz | |
dt-bindings: net: renesas,ether: Update example to match reality
- Drop unneeded interrupt-parent,
- Convert to new style CPG/MSSR bindings,
- Add missing power-domains and resets properties,
- Update PHY subnode:
- Add example compatible values,
- Add micrel,led-mode and reset-gpios examples.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'Documentation/devicetree/bindings/net/renesas,ether.yaml')
| -rw-r--r-- | Documentation/devicetree/bindings/net/renesas,ether.yaml | 17 |
1 files changed, 12 insertions, 5 deletions
diff --git a/Documentation/devicetree/bindings/net/renesas,ether.yaml b/Documentation/devicetree/bindings/net/renesas,ether.yaml index c101a1ec846e..06b38c9bc6ec 100644 --- a/Documentation/devicetree/bindings/net/renesas,ether.yaml +++ b/Documentation/devicetree/bindings/net/renesas,ether.yaml @@ -100,15 +100,18 @@ additionalProperties: false examples: # Lager board - | - #include <dt-bindings/clock/r8a7790-clock.h> - #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/clock/r8a7790-cpg-mssr.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/power/r8a7790-sysc.h> + #include <dt-bindings/gpio/gpio.h> ethernet@ee700000 { compatible = "renesas,ether-r8a7790", "renesas,rcar-gen2-ether"; reg = <0xee700000 0x400>; - interrupt-parent = <&gic>; - interrupts = <0 162 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&mstp8_clks R8A7790_CLK_ETHER>; + interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 813>; + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; + resets = <&cpg 813>; phy-mode = "rmii"; phy-handle = <&phy1>; renesas,ether-link-active-low; @@ -116,8 +119,12 @@ examples: #size-cells = <0>; phy1: ethernet-phy@1 { + compatible = "ethernet-phy-id0022.1537", + "ethernet-phy-ieee802.3-c22"; reg = <1>; interrupt-parent = <&irqc0>; interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + micrel,led-mode = <1>; + reset-gpios = <&gpio5 31 GPIO_ACTIVE_LOW>; }; }; |