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authorJacob Chen <jacob-chen@iotwrt.com>2017-10-11 10:29:34 +0300
committerMauro Carvalho Chehab <mchehab@osg.samsung.com>2017-10-17 02:05:07 +0300
commit7ef3b44ceafb5456b7e43e2bd96e22bb696806c9 (patch)
tree709772fbb5c096af0782873fc0a27486c782fd89 /Documentation/devicetree/bindings/media/rockchip-rga.txt
parent8382e556b1a2f30c4bf866f021b33577a64f9ebf (diff)
downloadlinux-7ef3b44ceafb5456b7e43e2bd96e22bb696806c9.tar.xz
[media] dt-bindings: Document the Rockchip RGA bindings
Add DT bindings documentation for Rockchip RGA Signed-off-by: Jacob Chen <jacob-chen@iotwrt.com> Signed-off-by: Yakir Yang <ykk@rock-chips.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Hans Verkuil <hansverk@cisco.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
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+device-tree bindings for rockchip 2D raster graphic acceleration controller (RGA)
+
+RGA is a standalone 2D raster graphic acceleration unit. It accelerates 2D
+graphics operations, such as point/line drawing, image scaling, rotation,
+BitBLT, alpha blending and image blur/sharpness.
+
+Required properties:
+- compatible: value should be one of the following
+ "rockchip,rk3288-rga";
+ "rockchip,rk3399-rga";
+
+- interrupts: RGA interrupt specifier.
+
+- clocks: phandle to RGA sclk/hclk/aclk clocks
+
+- clock-names: should be "aclk", "hclk" and "sclk"
+
+- resets: Must contain an entry for each entry in reset-names.
+ See ../reset/reset.txt for details.
+- reset-names: should be "core", "axi" and "ahb"
+
+Example:
+SoC-specific DT entry:
+ rga: rga@ff680000 {
+ compatible = "rockchip,rk3399-rga";
+ reg = <0xff680000 0x10000>;
+ interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru SCLK_RGA_CORE>;
+ clock-names = "aclk", "hclk", "sclk";
+
+ resets = <&cru SRST_RGA_CORE>, <&cru SRST_A_RGA>, <&cru SRST_H_RGA>;
+ reset-names = "core, "axi", "ahb";
+ };