dt-bindings: arm: Rename Coresight filenames to match compatible

Use the compatible strings for filenames as that is the preferred naming
convention for DT bindings.

Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220603011933.3277315-2-robh@kernel.org
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>

1 files changed, 0 insertions, 49 deletions

diff --git a/Documentation/devicetree/bindings/arm/trbe.yaml b/Documentation/devicetree/bindings/arm/trbe.yaml
deleted file mode 100644
index 4402d7bfd1fc..000000000000
--- a/Documentation/devicetree/bindings/arm/trbe.yaml
+++ /dev/null
@@ -1,49 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
-# Copyright 2021, Arm Ltd
-%YAML 1.2
----
-$id: "http://devicetree.org/schemas/arm/trbe.yaml#"
-$schema: "http://devicetree.org/meta-schemas/core.yaml#"
-
-title: ARM Trace Buffer Extensions
-
-maintainers:
-  - Anshuman Khandual <anshuman.khandual@arm.com>
-
-description: |
-  Arm Trace Buffer Extension (TRBE) is a per CPU component
-  for storing trace generated on the CPU to memory. It is
-  accessed via CPU system registers. The software can verify
-  if it is permitted to use the component by checking the
-  TRBIDR register.
-
-properties:
-  $nodename:
-    const: "trbe"
-  compatible:
-    items:
-      - const: arm,trace-buffer-extension
-
-  interrupts:
-    description: |
-       Exactly 1 PPI must be listed. For heterogeneous systems where
-       TRBE is only supported on a subset of the CPUs, please consult
-       the arm,gic-v3 binding for details on describing a PPI partition.
-    maxItems: 1
-
-required:
-  - compatible
-  - interrupts
-
-additionalProperties: false
-
-examples:
-
-  - |
-   #include <dt-bindings/interrupt-controller/arm-gic.h>
-
-   trbe {
-     compatible = "arm,trace-buffer-extension";
-     interrupts = <GIC_PPI 15 IRQ_TYPE_LEVEL_HIGH>;
-   };
-...