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| author | Dmitry Torokhov <dmitry.torokhov@gmail.com> | 2014-10-03 22:24:46 +0400 |
|---|---|---|
| committer | Dmitry Torokhov <dmitry.torokhov@gmail.com> | 2014-10-03 22:24:46 +0400 |
| commit | 447a8b858e4bda41c394b1bc7fdbc9dc0bdf44f6 (patch) | |
| tree | 676e741f2552c9cb301e1e49c557b92bf8940f55 /Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt | |
| parent | 3049683eafdbbbd7350b0e5ca02a2d8c026a3362 (diff) | |
| parent | 042e1c79166b9250edd8262bea84e1703f27ad2e (diff) | |
| download | linux-447a8b858e4bda41c394b1bc7fdbc9dc0bdf44f6.tar.xz | |
Merge branch 'next' into for-linus
Prepare first round of input updates for 3.18.
Diffstat (limited to 'Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt')
| -rw-r--r-- | Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt index df0a452b8526..934f00025cc4 100644 --- a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt +++ b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt @@ -31,6 +31,17 @@ Example: reboot-offset = <0x4>; }; +----------------------------------------------------------------------- +Hisilicon CPU controller + +Required properties: +- compatible : "hisilicon,cpuctrl" +- reg : Register address and size + +The clock registers and power registers of secondary cores are defined +in CPU controller, especially in HIX5HD2 SoC. + +----------------------------------------------------------------------- PCTRL: Peripheral misc control register Required Properties: |