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authorIngo Molnar <mingo@kernel.org>2014-05-07 15:15:46 +0400
committerIngo Molnar <mingo@kernel.org>2014-05-07 15:15:46 +0400
commit2fe5de9ce7d57498abc14b375cad2fcf8c3ee6cc (patch)
tree9478e8cf470c1d5bdb2d89b57a7e35919ab95e72 /Documentation/devicetree/bindings/arm/cpus.txt
parent08f8aeb55d7727d644dbbbbfb798fe937d47751d (diff)
parent2b4cfe64dee0d84506b951d81bf55d9891744d25 (diff)
downloadlinux-2fe5de9ce7d57498abc14b375cad2fcf8c3ee6cc.tar.xz
Merge branch 'sched/urgent' into sched/core, to avoid conflicts
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/arm/cpus.txt')
-rw-r--r--Documentation/devicetree/bindings/arm/cpus.txt25
1 files changed, 24 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt
index 91304353eea4..333f4aea3029 100644
--- a/Documentation/devicetree/bindings/arm/cpus.txt
+++ b/Documentation/devicetree/bindings/arm/cpus.txt
@@ -180,7 +180,11 @@ nodes to be present and contain the properties described below.
be one of:
"spin-table"
"psci"
- # On ARM 32-bit systems this property is optional.
+ # On ARM 32-bit systems this property is optional and
+ can be one of:
+ "qcom,gcc-msm8660"
+ "qcom,kpss-acc-v1"
+ "qcom,kpss-acc-v2"
- cpu-release-addr
Usage: required for systems that have an "enable-method"
@@ -191,6 +195,21 @@ nodes to be present and contain the properties described below.
property identifying a 64-bit zero-initialised
memory location.
+ - qcom,saw
+ Usage: required for systems that have an "enable-method"
+ property value of "qcom,kpss-acc-v1" or
+ "qcom,kpss-acc-v2"
+ Value type: <phandle>
+ Definition: Specifies the SAW[1] node associated with this CPU.
+
+ - qcom,acc
+ Usage: required for systems that have an "enable-method"
+ property value of "qcom,kpss-acc-v1" or
+ "qcom,kpss-acc-v2"
+ Value type: <phandle>
+ Definition: Specifies the ACC[2] node associated with this CPU.
+
+
Example 1 (dual-cluster big.LITTLE system 32-bit):
cpus {
@@ -382,3 +401,7 @@ cpus {
cpu-release-addr = <0 0x20000000>;
};
};
+
+--
+[1] arm/msm/qcom,saw2.txt
+[2] arm/msm/qcom,kpss-acc.txt