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| author | Frank Rowand <frank.rowand@sony.com> | 2017-06-22 19:15:39 +0300 |
|---|---|---|
| committer | Rob Herring <robh@kernel.org> | 2017-06-22 19:22:06 +0300 |
| commit | 076fb0c4b6e1f6883477d1e4ee89464924e64737 (patch) | |
| tree | 0ce0d0baecb6ed6e68129360a7283ca3f211228a /Documentation/devicetree/bindings/arm/cpus.txt | |
| parent | 7782b1444645768f5f213eaff6994604c6c0e635 (diff) | |
| download | linux-076fb0c4b6e1f6883477d1e4ee89464924e64737.tar.xz | |
of: update ePAPR references to point to Devicetree Specification
The Devicetree Specification has superseded the ePAPR as the
base specification for bindings. Update files in Documentation
to reference the new document.
First reference to ePAPR in Documentation/devicetree/bindings/arm/cci.txt
is generic, remove it.
Some files are not updated because there is no hypervisor chapter
in the Devicetree Specification:
Documentation/devicetree/bindings/powerpc/fsl/msi-pic.txt
Documenation/virtual/kvm/api.txt
Documenation/virtual/kvm/ppc-pv.txt
Signed-off-by: Frank Rowand <frank.rowand@sony.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/arm/cpus.txt')
| -rw-r--r-- | Documentation/devicetree/bindings/arm/cpus.txt | 13 |
1 files changed, 7 insertions, 6 deletions
diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt index 1030f5f50207..283c520a2224 100644 --- a/Documentation/devicetree/bindings/arm/cpus.txt +++ b/Documentation/devicetree/bindings/arm/cpus.txt @@ -6,9 +6,9 @@ The device tree allows to describe the layout of CPUs in a system through the "cpus" node, which in turn contains a number of subnodes (ie "cpu") defining properties for every cpu. -Bindings for CPU nodes follow the ePAPR v1.1 standard, available from: +Bindings for CPU nodes follow the Devicetree Specification, available from: -https://www.power.org/documentation/epapr-version-1-1/ +https://www.devicetree.org/specifications/ with updates for 32-bit and 64-bit ARM systems provided in this document. @@ -16,8 +16,8 @@ with updates for 32-bit and 64-bit ARM systems provided in this document. Convention used in this document ================================ -This document follows the conventions described in the ePAPR v1.1, with -the addition: +This document follows the conventions described in the Devicetree +Specification, with the addition: - square brackets define bitfields, eg reg[7:0] value of the bitfield in the reg property contained in bits 7 down to 0 @@ -26,8 +26,9 @@ the addition: cpus and cpu node bindings definition ===================================== -The ARM architecture, in accordance with the ePAPR, requires the cpus and cpu -nodes to be present and contain the properties described below. +The ARM architecture, in accordance with the Devicetree Specification, +requires the cpus and cpu nodes to be present and contain the properties +described below. - cpus node |