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authorMaxime Ripard <maxime.ripard@free-electrons.com>2014-07-03 17:58:49 +0400
committerNicolas Ferre <nicolas.ferre@atmel.com>2014-08-25 18:02:26 +0400
commit8d248f0d3a1ddb3c671b4029f8950fbad09be7ae (patch)
treeac57e82af0222496cf5c6e993b85861a25fdd9e8 /Documentation/devicetree/bindings/arm/atmel-at91.txt
parent9e8be232b934418932e40da276f6871dce83fa7c (diff)
downloadlinux-8d248f0d3a1ddb3c671b4029f8950fbad09be7ae.tar.xz
ARM: at91: Rework ramc mapping code
Adapt the ramc mapping code to handle multiple ram controllers in the DT. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat (limited to 'Documentation/devicetree/bindings/arm/atmel-at91.txt')
-rw-r--r--Documentation/devicetree/bindings/arm/atmel-at91.txt7
1 files changed, 0 insertions, 7 deletions
diff --git a/Documentation/devicetree/bindings/arm/atmel-at91.txt b/Documentation/devicetree/bindings/arm/atmel-at91.txt
index 33bcf8b57798..6e3e3e5c611f 100644
--- a/Documentation/devicetree/bindings/arm/atmel-at91.txt
+++ b/Documentation/devicetree/bindings/arm/atmel-at91.txt
@@ -63,7 +63,6 @@ RAMC SDRAM/DDR Controller required properties:
"atmel,at91sam9g45-ddramc",
"atmel,sama5d3-ddramc",
- reg: Should contain registers location and length
- For at91sam9263 and at91sam9g45 you must specify 2 entries.
Examples:
@@ -72,12 +71,6 @@ Examples:
reg = <0xffffe800 0x200>;
};
- ramc0: ramc@ffffe400 {
- compatible = "atmel,at91sam9g45-ddramc";
- reg = <0xffffe400 0x200
- 0xffffe600 0x200>;
- };
-
SHDWC Shutdown Controller
required properties: