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| author | Christoph Hellwig <hch@lst.de> | 2022-01-03 21:35:51 +0300 |
|---|---|---|
| committer | Alexei Starovoitov <ast@kernel.org> | 2022-01-06 00:11:26 +0300 |
| commit | 62e4683849b6516c71e91f36e4fc0393a5883cfb (patch) | |
| tree | e3104d09164f97e171b0b3d44d7d7371f6ad908e /Documentation/bpf | |
| parent | ca796fe66f7fceff17679ee6cc5fe4b4023de44d (diff) | |
| download | linux-62e4683849b6516c71e91f36e4fc0393a5883cfb.tar.xz | |
bpf, docs: Add a setion to explain the basic instruction encoding
The eBPF instruction set document does not currently document the basic
instruction encoding. Add a section to do that.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Alexei Starovoitov <ast@kernel.org>
Link: https://lore.kernel.org/bpf/20220103183556.41040-2-hch@lst.de
Diffstat (limited to 'Documentation/bpf')
| -rw-r--r-- | Documentation/bpf/instruction-set.rst | 16 |
1 files changed, 15 insertions, 1 deletions
diff --git a/Documentation/bpf/instruction-set.rst b/Documentation/bpf/instruction-set.rst index 1af51143ff9f..80f42984b594 100644 --- a/Documentation/bpf/instruction-set.rst +++ b/Documentation/bpf/instruction-set.rst @@ -19,8 +19,22 @@ The eBPF calling convention is defined as: R0 - R5 are scratch registers and eBPF programs needs to spill/fill them if necessary across calls. +Instruction encoding +==================== + +eBPF uses 64-bit instructions with the following encoding: + + ============= ======= =============== ==================== ============ + 32 bits (MSB) 16 bits 4 bits 4 bits 8 bits (LSB) + ============= ======= =============== ==================== ============ + immediate offset source register destination register opcode + ============= ======= =============== ==================== ============ + +Note that most instructions do not use all of the fields. +Unused fields shall be cleared to zero. + Instruction classes -=================== +------------------- The three LSB bits of the 'opcode' field store the instruction class: |