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authorEmil Renner Berthing <kernel@esmil.dk>2022-04-06 01:38:05 +0300
committerEmil Renner Berthing <kernel@esmil.dk>2022-07-13 00:26:03 +0300
commita4cafc776f0dd75e94ea4be8f483d55c084564df (patch)
tree15c510c96632d7019bab34f3814d53c4621e2527
parent1e6c0766c9b628495fe402617de35d7de6b8064e (diff)
downloadlinux-a4cafc776f0dd75e94ea4be8f483d55c084564df.tar.xz
soc: sifive: l2 cache: Add StarFive JH7100 support
This adds support for the StarFive JH7100 SoC which also features this SiFive cache controller. Unfortunately the data corrected interrupt is broken and fires continuously, so add a quirk to not register a handler for it. Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
-rw-r--r--arch/riscv/Kconfig.socs1
-rw-r--r--drivers/soc/Makefile2
-rw-r--r--drivers/soc/sifive/Kconfig2
-rw-r--r--drivers/soc/sifive/sifive_l2_cache.c6
4 files changed, 9 insertions, 2 deletions
diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
index f6ef358d8a2c..86a8ee49e808 100644
--- a/arch/riscv/Kconfig.socs
+++ b/arch/riscv/Kconfig.socs
@@ -23,6 +23,7 @@ config SOC_STARFIVE
bool "StarFive SoCs"
select PINCTRL
select RESET_CONTROLLER
+ select SIFIVE_L2
select SIFIVE_PLIC
help
This enables support for StarFive SoC platform hardware.
diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile
index 904eec2a7871..5ccaa897c7fd 100644
--- a/drivers/soc/Makefile
+++ b/drivers/soc/Makefile
@@ -24,7 +24,7 @@ obj-y += qcom/
obj-y += renesas/
obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
obj-$(CONFIG_SOC_SAMSUNG) += samsung/
-obj-$(CONFIG_SOC_SIFIVE) += sifive/
+obj-y += sifive/
obj-y += sunxi/
obj-$(CONFIG_ARCH_TEGRA) += tegra/
obj-y += ti/
diff --git a/drivers/soc/sifive/Kconfig b/drivers/soc/sifive/Kconfig
index 58cf8c40d08d..776b30723c04 100644
--- a/drivers/soc/sifive/Kconfig
+++ b/drivers/soc/sifive/Kconfig
@@ -1,6 +1,6 @@
# SPDX-License-Identifier: GPL-2.0
-if SOC_SIFIVE
+if SOC_SIFIVE || SOC_STARFIVE
config SIFIVE_L2
bool "Sifive L2 Cache controller"
diff --git a/drivers/soc/sifive/sifive_l2_cache.c b/drivers/soc/sifive/sifive_l2_cache.c
index 010d612f7420..5fd769b50f00 100644
--- a/drivers/soc/sifive/sifive_l2_cache.c
+++ b/drivers/soc/sifive/sifive_l2_cache.c
@@ -10,6 +10,7 @@
#include <linux/io.h>
#include <linux/mod_devicetable.h>
#include <linux/platform_device.h>
+#include <linux/property.h>
#include <asm/cacheinfo.h>
#include <soc/sifive/sifive_l2_cache.h>
@@ -189,6 +190,7 @@ static irqreturn_t l2_int_handler(int irq, void *device)
static int __init sifive_l2_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
+ unsigned long quirks = (uintptr_t)device_get_match_data(dev);
int nirqs;
int ret;
int i;
@@ -206,6 +208,9 @@ static int __init sifive_l2_probe(struct platform_device *pdev)
if (g_irq[i] < 0)
return g_irq[i];
+ if (quirks & BIT(i))
+ continue;
+
ret = devm_request_irq(dev, g_irq[i], l2_int_handler, 0, pdev->name, NULL);
if (ret)
return dev_err_probe(dev, ret, "Could not request IRQ %d\n", g_irq[i]);
@@ -225,6 +230,7 @@ static int __init sifive_l2_probe(struct platform_device *pdev)
static const struct of_device_id sifive_l2_match[] = {
{ .compatible = "sifive,fu540-c000-ccache" },
{ .compatible = "sifive,fu740-c000-ccache" },
+ { .compatible = "starfive,jh7100-ccache", .data = (void *)BIT(DATA_UNCORR) },
{ /* sentinel */ }
};