cache: dubhe: emphasize controller's L2 cache compatibility

Dubhe cache controller handles level 2 cache.
To avoid confusion, emphasize it's L2 cache compatibility through
driver name update and Kconfig description.

Signed-off-by: Ji Sheng Teoh <jisheng.teoh@starfivetech.com>

3 files changed, 12 insertions, 12 deletions

diff --git a/drivers/cache/Kconfig b/drivers/cache/Kconfig
index e6b14709a085..9bbe15cd898f 100644
--- a/drivers/cache/Kconfig
+++ b/drivers/cache/Kconfig
@@ -13,8 +13,8 @@ config STARFIVE_DUBHE_L2_CACHE
 	depends on ARCH_STARFIVE
 	select RISCV_NONSTANDARD_CACHE_OPS
 	help
-	  Support for the cache controller on StarFive platforms.
-	  StarFive Dubhe Cache Controller implementation predates
+	  Support for the L2 cache controller on StarFive platforms.
+	  StarFive Dubhe L2 cache controller implementation predates
 	  RISC-V CMO ISA extension. This allow vendor specific
 	  implementation to handle non-coherent DMA through global
 	  memory pool.
diff --git a/drivers/cache/Makefile b/drivers/cache/Makefile
index feb806c141b0..916e6a6fcef1 100644
--- a/drivers/cache/Makefile
+++ b/drivers/cache/Makefile
@@ -1,4 +1,4 @@
 # SPDX-License-Identifier: GPL-2.0
 
 obj-$(CONFIG_AX45MP_L2_CACHE) += ax45mp_cache.o
-obj-$(CONFIG_STARFIVE_DUBHE_L2_CACHE) += starfive_dubhe_cache.o
\ No newline at end of file
+obj-$(CONFIG_STARFIVE_DUBHE_L2_CACHE) += starfive_dubhe_l2cache.o
\ No newline at end of file
diff --git a/drivers/cache/starfive_dubhe_cache.c b/drivers/cache/starfive_dubhe_l2cache.c
index 79f8b908238b..b8aec05d37c6 100644
--- a/drivers/cache/starfive_dubhe_cache.c
+++ b/drivers/cache/starfive_dubhe_l2cache.c
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
- * StarFive cache controller driver
+ * StarFive L2 cache controller driver
  *
  * Copyright (C) 2023 StarFive Technology Co., Ltd.
  *
@@ -18,26 +18,26 @@ enum starfive_sbi_ext_fid {
 	STARFIVE_SBI_EXT_L2_INVALIDATE,
 };
 
-static void sbi_cache_flush(phys_addr_t paddr, size_t size)
+static void sbi_l2cache_flush(phys_addr_t paddr, size_t size)
 {
 	sbi_ecall(STARFIVE_SBI_EXT, STARFIVE_SBI_EXT_L2_FLUSH,
 		  paddr, size, 0, 0, 0, 0);
 }
 
-static void sbi_cache_invalidate(phys_addr_t paddr, size_t size)
+static void sbi_l2cache_invalidate(phys_addr_t paddr, size_t size)
 {
 	sbi_ecall(STARFIVE_SBI_EXT, STARFIVE_SBI_EXT_L2_INVALIDATE,
 		  paddr, size, 0, 0, 0, 0);
 }
 
 static const struct riscv_nonstd_cache_ops dubhe_cmo_ops __initdata = {
-	.wback = &sbi_cache_flush,
-	.inv = &sbi_cache_invalidate,
-	.wback_inv = &sbi_cache_invalidate,
+	.wback = &sbi_l2cache_flush,
+	.inv = &sbi_l2cache_invalidate,
+	.wback_inv = &sbi_l2cache_invalidate,
 };
 
-static const struct of_device_id starfive_cache_ids[] = {
-	{ .compatible = "starfive,dubhe-cache" },
+static const struct of_device_id starfive_l2cache_ids[] = {
+	{ .compatible = "starfive,dubhe-l2cache" },
 	{ /* end of table */ }
 };
 
@@ -45,7 +45,7 @@ static int __init starfive_cache_init(void)
 {
 	struct device_node *np;
 
-	np = of_find_matching_node(NULL, starfive_cache_ids);
+	np = of_find_matching_node(NULL, starfive_l2cache_ids);
 	if (!of_device_is_available(np))
 		return -ENODEV;