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| author | Ji Sheng Teoh <jisheng.teoh@starfivetech.com> | 2023-12-29 12:39:39 +0300 |
|---|---|---|
| committer | Ji Sheng Teoh <jisheng.teoh@starfivetech.com> | 2024-01-09 12:38:22 +0300 |
| commit | 0c1c10a6bab4d06e0b32d5b8f8558d431d4ea486 (patch) | |
| tree | 2eb58f40a0552e630308175bc719c5cb6ff767e1 | |
| parent | 5e8330006fd85400948620aef8351846a7b21e22 (diff) | |
| download | linux-0c1c10a6bab4d06e0b32d5b8f8558d431d4ea486.tar.xz | |
Revert "arch: riscv: kvm: Temporarily comment out henvcfg-related code"
This reverts commit d181fd3d146844db2d5095ae208b8664160e4eb0.
Signed-off-by: Ji Sheng Teoh <jisheng.teoh@starfivetech.com>
| -rw-r--r-- | arch/riscv/kvm/vcpu.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c index abd88049eb3c..82229db1ce73 100644 --- a/arch/riscv/kvm/vcpu.c +++ b/arch/riscv/kvm/vcpu.c @@ -507,8 +507,7 @@ void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu) csr_write(CSR_HVIP, csr->hvip); csr_write(CSR_VSATP, csr->vsatp); - /* Temporarily commented out while Dubhe is still using Hypervisor ISA v0.6 */ - /* kvm_riscv_vcpu_update_config(vcpu->arch.isa); */ + kvm_riscv_vcpu_update_config(vcpu->arch.isa); kvm_riscv_gstage_update_hgatp(vcpu); |