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| author | Maxime Ripard <maxime.ripard@bootlin.com> | 2019-03-25 16:52:43 +0300 |
|---|---|---|
| committer | Maxime Ripard <maxime.ripard@bootlin.com> | 2019-03-25 23:26:28 +0300 |
| commit | 655c0f429fff6e17e0d5bde141bc759ed5d1927f (patch) | |
| tree | cc539b3f7952a5ffb630315c40fd963e0cd55fd3 | |
| parent | 939b6654344c8b37399adfea12018b10a53c67de (diff) | |
| download | linux-655c0f429fff6e17e0d5bde141bc759ed5d1927f.tar.xz | |
ARM: sunxi: dts: Split USB PHY cells into an array
Even though it doesn't make any difference at the binary level, the reg
property is an array of cells, and should be represented as such.
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| -rw-r--r-- | arch/arm/boot/dts/sun4i-a10.dtsi | 2 | ||||
| -rw-r--r-- | arch/arm/boot/dts/sun5i.dtsi | 2 | ||||
| -rw-r--r-- | arch/arm/boot/dts/sun7i-a20.dtsi | 2 |
3 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi index 5cd26ad40a26..f8a67b95c139 100644 --- a/arch/arm/boot/dts/sun4i-a10.dtsi +++ b/arch/arm/boot/dts/sun4i-a10.dtsi @@ -502,7 +502,7 @@ usbphy: phy@1c13400 { #phy-cells = <1>; compatible = "allwinner,sun4i-a10-usb-phy"; - reg = <0x01c13400 0x10 0x01c14800 0x4 0x01c1c800 0x4>; + reg = <0x01c13400 0x10>, <0x01c14800 0x4>, <0x01c1c800 0x4>; reg-names = "phy_ctrl", "pmu1", "pmu2"; clocks = <&ccu CLK_USB_PHY>; clock-names = "usb_phy"; diff --git a/arch/arm/boot/dts/sun5i.dtsi b/arch/arm/boot/dts/sun5i.dtsi index 49ba494400e6..7dc67cf771c1 100644 --- a/arch/arm/boot/dts/sun5i.dtsi +++ b/arch/arm/boot/dts/sun5i.dtsi @@ -366,7 +366,7 @@ usbphy: phy@1c13400 { #phy-cells = <1>; compatible = "allwinner,sun5i-a13-usb-phy"; - reg = <0x01c13400 0x10 0x01c14800 0x4>; + reg = <0x01c13400 0x10>, <0x01c14800 0x4>; reg-names = "phy_ctrl", "pmu1"; clocks = <&ccu CLK_USB_PHY0>; clock-names = "usb_phy"; diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi index 767509809d06..f087a7ce95aa 100644 --- a/arch/arm/boot/dts/sun7i-a20.dtsi +++ b/arch/arm/boot/dts/sun7i-a20.dtsi @@ -594,7 +594,7 @@ usbphy: phy@1c13400 { #phy-cells = <1>; compatible = "allwinner,sun7i-a20-usb-phy"; - reg = <0x01c13400 0x10 0x01c14800 0x4 0x01c1c800 0x4>; + reg = <0x01c13400 0x10>, <0x01c14800 0x4>, <0x01c1c800 0x4>; reg-names = "phy_ctrl", "pmu1", "pmu2"; clocks = <&ccu CLK_USB_PHY>; clock-names = "usb_phy"; |