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| author | Chris Brandt <chris.brandt@renesas.com> | 2016-09-26 23:40:31 +0300 |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2016-11-04 12:36:23 +0300 |
| commit | 66474697923cd166567b06b492e52adce12393eb (patch) | |
| tree | d002a09f8cfdb0b6ca2f36274c49e2674d9619a3 | |
| parent | 0f4eebb63eb779b50e05bde0f46ea21213f4c465 (diff) | |
| download | linux-66474697923cd166567b06b492e52adce12393eb.tar.xz | |
ARM: dts: r7s72100: add sdhi to device tree
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| -rw-r--r-- | arch/arm/boot/dts/r7s72100.dtsi | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi index eab06701ef11..3dd427d68c83 100644 --- a/arch/arm/boot/dts/r7s72100.dtsi +++ b/arch/arm/boot/dts/r7s72100.dtsi @@ -470,4 +470,30 @@ bus-width = <8>; status = "disabled"; }; + + sdhi0: sd@e804e000 { + compatible = "renesas,sdhi-r7s72100"; + reg = <0xe804e000 0x100>; + interrupts = <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>; + + clocks = <&mstp12_clks R7S72100_CLK_SDHI0>; + cap-sd-highspeed; + cap-sdio-irq; + status = "disabled"; + }; + + sdhi1: sd@e804e800 { + compatible = "renesas,sdhi-r7s72100"; + reg = <0xe804e800 0x100>; + interrupts = <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>; + + clocks = <&mstp12_clks R7S72100_CLK_SDHI1>; + cap-sd-highspeed; + cap-sdio-irq; + status = "disabled"; + }; }; |