diff options
| author | Sowjanya Komatineni <skomatineni@nvidia.com> | 2019-03-27 08:56:33 +0300 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2019-04-01 11:50:47 +0300 |
| commit | 2b17a3c759e5e2ed3faafb69e243ec312e3bf0da (patch) | |
| tree | 9a59455aed5ac66773ca5e5745da27942044a995 | |
| parent | fc9ba6e3e28afcedf3bb3105b1d8cbc5c183c2a3 (diff) | |
| download | linux-2b17a3c759e5e2ed3faafb69e243ec312e3bf0da.tar.xz | |
spi: tegra114: add SPI_LSB_FIRST support
Tegra SPI controller supports lsb first mode. Default is MSB bit first
and on selection of SPI_LSB_FIRST through SPI mode transmission happens
with LSB bit first.
This patch adds SPI_LSB_FIRST flag to mode_bits and also configures it
on request.
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
| -rw-r--r-- | drivers/spi/spi-tegra114.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/drivers/spi/spi-tegra114.c b/drivers/spi/spi-tegra114.c index 929358e3487a..0c52aeeb1d4f 100644 --- a/drivers/spi/spi-tegra114.c +++ b/drivers/spi/spi-tegra114.c @@ -696,6 +696,11 @@ static u32 tegra_spi_setup_transfer_one(struct spi_device *spi, else if (req_mode == SPI_MODE_3) command1 |= SPI_CONTROL_MODE_3; + if (spi->mode & SPI_LSB_FIRST) + command1 |= SPI_LSBIT_FE; + else + command1 &= ~SPI_LSBIT_FE; + if (tspi->cs_control) { if (tspi->cs_control != spi) tegra_spi_writel(tspi, command1, SPI_COMMAND1); @@ -1047,7 +1052,7 @@ static int tegra_spi_probe(struct platform_device *pdev) master->max_speed_hz = 25000000; /* 25MHz */ /* the spi->mode bits understood by this driver: */ - master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; + master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LSB_FIRST; master->setup = tegra_spi_setup; master->transfer_one_message = tegra_spi_transfer_one_message; master->num_chipselect = MAX_CHIP_SELECT; |