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authorPeter De Schrijver <pdeschrijver@nvidia.com>2013-10-14 17:47:37 +0400
committerPeter De Schrijver <pdeschrijver@nvidia.com>2013-11-26 20:46:23 +0400
commitb8700d506ac4050fd96ce9305df04df811365326 (patch)
treecd3cd4be2dff9c903c0c9ca3965520715df36026
parenta59ba9565ee20d162e858de03b9eebc0b9dbd8b6 (diff)
downloadlinux-b8700d506ac4050fd96ce9305df04df811365326.tar.xz
clk: tegra: add common infra for DT clocks
Introduce a common infrastructure for sharing clock initialization between SoCs. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
-rw-r--r--drivers/clk/tegra/clk.c9
-rw-r--r--drivers/clk/tegra/clk.h7
2 files changed, 16 insertions, 0 deletions
diff --git a/drivers/clk/tegra/clk.c b/drivers/clk/tegra/clk.c
index 3a95a8757ebc..a0430cd65d7c 100644
--- a/drivers/clk/tegra/clk.c
+++ b/drivers/clk/tegra/clk.c
@@ -212,6 +212,15 @@ void __init tegra_add_of_provider(struct device_node *np)
of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
}
+struct clk ** __init tegra_lookup_dt_id(int clk_id,
+ struct tegra_clk *tegra_clk)
+{
+ if (tegra_clk[clk_id].present)
+ return &clks[tegra_clk[clk_id].dt_id];
+ else
+ return NULL;
+}
+
tegra_clk_apply_init_table_func tegra_clk_apply_init_table;
void __init tegra_clocks_apply_init_table(void)
diff --git a/drivers/clk/tegra/clk.h b/drivers/clk/tegra/clk.h
index c49df4dc5ac6..489dad59d1d5 100644
--- a/drivers/clk/tegra/clk.h
+++ b/drivers/clk/tegra/clk.h
@@ -568,6 +568,11 @@ struct tegra_clk_duplicate {
}, \
}
+struct tegra_clk {
+ int dt_id;
+ bool present;
+};
+
void tegra_init_from_table(struct tegra_clk_init_table *tbl,
struct clk *clks[], int clk_max);
@@ -577,6 +582,8 @@ void tegra_init_dup_clks(struct tegra_clk_duplicate *dup_list,
struct tegra_clk_periph_regs *get_reg_bank(int clkid);
struct clk **tegra_clk_init(int num, int periph_banks);
+struct clk **tegra_lookup_dt_id(int clk_id, struct tegra_clk *tegra_clk);
+
void tegra_add_of_provider(struct device_node *np);
void tegra114_clock_tune_cpu_trimmers_high(void);