diff options
author | Jonathan Cameron <Jonathan.Cameron@huawei.com> | 2022-05-08 20:56:24 +0300 |
---|---|---|
committer | Jonathan Cameron <Jonathan.Cameron@huawei.com> | 2022-06-14 13:53:15 +0300 |
commit | 94ec314e1bd686b669c24385ce2dbc967eb74147 (patch) | |
tree | 55efbaa5822785c9c0c50f10853c6960a8f3b60c | |
parent | 8779b88c214fa0f8fdfb9c54a124f468884d356a (diff) | |
download | linux-94ec314e1bd686b669c24385ce2dbc967eb74147.tar.xz |
iio: dac: ad5360: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.
Update the comment to include 'may'.
Fixes: a3e2940c24d3 ("staging:iio:dac: Add AD5360 driver")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-45-jic23@kernel.org
-rw-r--r-- | drivers/iio/dac/ad5360.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/iio/dac/ad5360.c b/drivers/iio/dac/ad5360.c index 22b000a40828..e0b7f658d611 100644 --- a/drivers/iio/dac/ad5360.c +++ b/drivers/iio/dac/ad5360.c @@ -79,13 +79,13 @@ struct ad5360_state { struct mutex lock; /* - * DMA (thus cache coherency maintenance) requires the + * DMA (thus cache coherency maintenance) may require the * transfer buffers to live in their own cache lines. */ union { __be32 d32; u8 d8[4]; - } data[2] ____cacheline_aligned; + } data[2] __aligned(IIO_DMA_MINALIGN); }; enum ad5360_type { |