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author | Jaehoon Chung <jh80.chung@samsung.com> | 2017-01-16 09:31:38 +0300 |
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committer | Bjorn Helgaas <bhelgaas@google.com> | 2017-02-08 22:40:46 +0300 |
commit | 92004a064875e45f0ceec72f6962e258e59f0682 (patch) | |
tree | 60df9cd1b297fa5b976be752ea41cd220dc5f852 | |
parent | 2681c0e7ff70a6d41a81527f95f2edabafea4ace (diff) | |
download | linux-92004a064875e45f0ceec72f6962e258e59f0682.tar.xz |
PCI: exynos: Remove duplicated code
Remove duplicated register reads and writes.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Jingoo Han <jingoohan1@gmail.com>
-rw-r--r-- | drivers/pci/host/pci-exynos.c | 22 |
1 files changed, 8 insertions, 14 deletions
diff --git a/drivers/pci/host/pci-exynos.c b/drivers/pci/host/pci-exynos.c index c5892c289efc..faee7d318f89 100644 --- a/drivers/pci/host/pci-exynos.c +++ b/drivers/pci/host/pci-exynos.c @@ -116,30 +116,24 @@ static void exynos_pcie_sideband_dbi_w_mode(struct exynos_pcie *ep, bool on) { u32 val; - if (on) { - val = exynos_pcie_readl(ep->elbi_base, PCIE_ELBI_SLV_AWMISC); + val = exynos_pcie_readl(ep->elbi_base, PCIE_ELBI_SLV_AWMISC); + if (on) val |= PCIE_ELBI_SLV_DBI_ENABLE; - exynos_pcie_writel(ep->elbi_base, val, PCIE_ELBI_SLV_AWMISC); - } else { - val = exynos_pcie_readl(ep->elbi_base, PCIE_ELBI_SLV_AWMISC); + else val &= ~PCIE_ELBI_SLV_DBI_ENABLE; - exynos_pcie_writel(ep->elbi_base, val, PCIE_ELBI_SLV_AWMISC); - } + exynos_pcie_writel(ep->elbi_base, val, PCIE_ELBI_SLV_AWMISC); } static void exynos_pcie_sideband_dbi_r_mode(struct exynos_pcie *ep, bool on) { u32 val; - if (on) { - val = exynos_pcie_readl(ep->elbi_base, PCIE_ELBI_SLV_ARMISC); + val = exynos_pcie_readl(ep->elbi_base, PCIE_ELBI_SLV_ARMISC); + if (on) val |= PCIE_ELBI_SLV_DBI_ENABLE; - exynos_pcie_writel(ep->elbi_base, val, PCIE_ELBI_SLV_ARMISC); - } else { - val = exynos_pcie_readl(ep->elbi_base, PCIE_ELBI_SLV_ARMISC); + else val &= ~PCIE_ELBI_SLV_DBI_ENABLE; - exynos_pcie_writel(ep->elbi_base, val, PCIE_ELBI_SLV_ARMISC); - } + exynos_pcie_writel(ep->elbi_base, val, PCIE_ELBI_SLV_ARMISC); } static void exynos_pcie_assert_core_reset(struct exynos_pcie *ep) |