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authorSean Wang <sean.wang@mediatek.com>2018-02-23 13:16:29 +0300
committerMatthias Brugger <matthias.bgg@gmail.com>2018-03-19 00:39:27 +0300
commit8e908df628eb4fba73f69e45bee863a11ec7dec8 (patch)
tree4a5553b184247eb9f404c7dfcf1fb535752db963
parentcc2f65242eec8a552fb6b6e1e411198e8401299c (diff)
downloadlinux-8e908df628eb4fba73f69e45bee863a11ec7dec8.tar.xz
arm: dts: mt7623: add related clock properties to cpu[1-3] nodes
Complement the missing clock properties cpu[1-3] should depend on. Signed-off-by: Sean Wang <sean.wang@mediatek.com> Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net> Cc: Viresh Kumar <viresh.kumar@linaro.org> Cc: linux-pm@vger.kernel.org Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
-rw-r--r--arch/arm/boot/dts/mt7623.dtsi9
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
index b750da5362f7..116775e58785 100644
--- a/arch/arm/boot/dts/mt7623.dtsi
+++ b/arch/arm/boot/dts/mt7623.dtsi
@@ -96,6 +96,9 @@
device_type = "cpu";
compatible = "arm,cortex-a7";
reg = <0x1>;
+ clocks = <&infracfg CLK_INFRA_CPUSEL>,
+ <&apmixedsys CLK_APMIXED_MAINPLL>;
+ clock-names = "cpu", "intermediate";
operating-points-v2 = <&cpu_opp_table>;
clock-frequency = <1300000000>;
};
@@ -104,6 +107,9 @@
device_type = "cpu";
compatible = "arm,cortex-a7";
reg = <0x2>;
+ clocks = <&infracfg CLK_INFRA_CPUSEL>,
+ <&apmixedsys CLK_APMIXED_MAINPLL>;
+ clock-names = "cpu", "intermediate";
operating-points-v2 = <&cpu_opp_table>;
clock-frequency = <1300000000>;
};
@@ -112,6 +118,9 @@
device_type = "cpu";
compatible = "arm,cortex-a7";
reg = <0x3>;
+ clocks = <&infracfg CLK_INFRA_CPUSEL>,
+ <&apmixedsys CLK_APMIXED_MAINPLL>;
+ clock-names = "cpu", "intermediate";
operating-points-v2 = <&cpu_opp_table>;
clock-frequency = <1300000000>;
};