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| author | Marco Felsch <m.felsch@pengutronix.de> | 2022-09-30 15:48:09 +0300 |
|---|---|---|
| committer | Sakari Ailus <sakari.ailus@linux.intel.com> | 2022-10-27 14:38:04 +0300 |
| commit | 7afa5db0eaae8f6c110690311167d5e5cd728efb (patch) | |
| tree | dcc0abb610b1960a65d4fd4dae7bc3f7530d74bb | |
| parent | 379c258677ccf0dab1032d531829f6d8440713fa (diff) | |
| download | linux-7afa5db0eaae8f6c110690311167d5e5cd728efb.tar.xz | |
phy: dphy: refactor get_default_config
Factor out the calculation into phy_mipi_dphy_calc_config(). This is
needed for the follow up patch which adds the support to calculate the
timings based on a given hs clock. No functional changes are done.
Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
Acked-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
| -rw-r--r-- | drivers/phy/phy-core-mipi-dphy.c | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/drivers/phy/phy-core-mipi-dphy.c b/drivers/phy/phy-core-mipi-dphy.c index 929e86d6558e..ba365bc77407 100644 --- a/drivers/phy/phy-core-mipi-dphy.c +++ b/drivers/phy/phy-core-mipi-dphy.c @@ -17,7 +17,7 @@ * from the valid ranges specified in Section 6.9, Table 14, Page 41 * of the D-PHY specification (v1.2). */ -int phy_mipi_dphy_get_default_config(unsigned long pixel_clock, +static int phy_mipi_dphy_calc_config(unsigned long pixel_clock, unsigned int bpp, unsigned int lanes, struct phy_configure_opts_mipi_dphy *cfg) @@ -75,6 +75,15 @@ int phy_mipi_dphy_get_default_config(unsigned long pixel_clock, return 0; } + +int phy_mipi_dphy_get_default_config(unsigned long pixel_clock, + unsigned int bpp, + unsigned int lanes, + struct phy_configure_opts_mipi_dphy *cfg) +{ + return phy_mipi_dphy_calc_config(pixel_clock, bpp, lanes, cfg); + +} EXPORT_SYMBOL(phy_mipi_dphy_get_default_config); /* |