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authorGeorgi Djakov <georgi.djakov@linaro.org>2020-10-12 22:40:34 +0300
committerGeorgi Djakov <georgi.djakov@linaro.org>2020-10-15 09:23:25 +0300
commit5be1805dc3961ce0465bcb0beab85fe8580af08d (patch)
tree3b1ea84cc9f26350aa0ed106503153ef2917b4f3
parent86d6e5793e0fa3a510cff466894d0d3051fd716e (diff)
downloadlinux-5be1805dc3961ce0465bcb0beab85fe8580af08d.tar.xz
interconnect: qcom: sdm845: Enable keepalive for the MM1 BCM
After enabling interconnect scaling for display on the db845c board, in certain configurations the board hangs, while the following errors are observed on the console: Error sending AMC RPMH requests (-110) qcom_rpmh TCS Busy, retrying RPMH message send: addr=0x50000 qcom_rpmh TCS Busy, retrying RPMH message send: addr=0x50000 qcom_rpmh TCS Busy, retrying RPMH message send: addr=0x50000 ... In this specific case, the above is related to one of the sequencers being stuck, while client drivers are returning from probe and trying to disable the currently unused clock and interconnect resources. Generally we want to keep the multimedia NoC enabled like the rest of the NoCs, so let's set the keepalive flag on it too. Fixes: aae57773fbe0 ("interconnect: qcom: sdm845: Split qnodes into their respective NoCs") Reported-by: Amit Pundir <amit.pundir@linaro.org> Reviewed-by: Mike Tipton <mdtipton@codeaurora.org> Tested-by: John Stultz <john.stultz@linaro.org> Link: https://lore.kernel.org/r/20201012194034.26944-1-georgi.djakov@linaro.org Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
-rw-r--r--drivers/interconnect/qcom/sdm845.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/interconnect/qcom/sdm845.c b/drivers/interconnect/qcom/sdm845.c
index d79e3163e2c3..67e8fc3396f8 100644
--- a/drivers/interconnect/qcom/sdm845.c
+++ b/drivers/interconnect/qcom/sdm845.c
@@ -151,7 +151,7 @@ DEFINE_QBCM(bcm_mc0, "MC0", true, &ebi);
DEFINE_QBCM(bcm_sh0, "SH0", true, &qns_llcc);
DEFINE_QBCM(bcm_mm0, "MM0", false, &qns_mem_noc_hf);
DEFINE_QBCM(bcm_sh1, "SH1", false, &qns_apps_io);
-DEFINE_QBCM(bcm_mm1, "MM1", false, &qxm_camnoc_hf0_uncomp, &qxm_camnoc_hf1_uncomp, &qxm_camnoc_sf_uncomp, &qxm_camnoc_hf0, &qxm_camnoc_hf1, &qxm_mdp0, &qxm_mdp1);
+DEFINE_QBCM(bcm_mm1, "MM1", true, &qxm_camnoc_hf0_uncomp, &qxm_camnoc_hf1_uncomp, &qxm_camnoc_sf_uncomp, &qxm_camnoc_hf0, &qxm_camnoc_hf1, &qxm_mdp0, &qxm_mdp1);
DEFINE_QBCM(bcm_sh2, "SH2", false, &qns_memnoc_snoc);
DEFINE_QBCM(bcm_mm2, "MM2", false, &qns2_mem_noc);
DEFINE_QBCM(bcm_sh3, "SH3", false, &acm_tcu);