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authorMasahiro Yamada <yamada.masahiro@socionext.com>2015-07-25 10:23:22 +0300
committerOlof Johansson <olof@lixom.net>2015-07-27 15:54:45 +0300
commit55d945b249eae485b57172fcba51f8629cd97c39 (patch)
tree62e1555ffbca5a2fc3bb486954397705da999720
parent743ca9e9f8e936b9575ced7a41d30f4dc4803a6f (diff)
downloadlinux-55d945b249eae485b57172fcba51f8629cd97c39.tar.xz
ARM: dts: UniPhier: add pinctrl device nodes
Add the pinctrol device nodes for UniPhier PH1-LD4, PH1-Pro4, and PH1-sLD8. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Olof Johansson <olof@lixom.net>
-rw-r--r--arch/arm/boot/dts/uniphier-ph1-ld4.dtsi6
-rw-r--r--arch/arm/boot/dts/uniphier-ph1-pro4.dtsi6
-rw-r--r--arch/arm/boot/dts/uniphier-ph1-sld8.dtsi6
3 files changed, 18 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/uniphier-ph1-ld4.dtsi b/arch/arm/boot/dts/uniphier-ph1-ld4.dtsi
index 600a473efad8..518eab732a01 100644
--- a/arch/arm/boot/dts/uniphier-ph1-ld4.dtsi
+++ b/arch/arm/boot/dts/uniphier-ph1-ld4.dtsi
@@ -148,6 +148,12 @@
interrupts = <0 82 4>;
};
+ pinctrl: pinctrl@5f801000 {
+ compatible = "socionext,ph1-ld4-pinctrl",
+ "syscon";
+ reg = <0x5f801000 0xe00>;
+ };
+
timer@60000200 {
compatible = "arm,cortex-a9-global-timer";
reg = <0x60000200 0x20>;
diff --git a/arch/arm/boot/dts/uniphier-ph1-pro4.dtsi b/arch/arm/boot/dts/uniphier-ph1-pro4.dtsi
index 4598bb2785b6..789bd48b7673 100644
--- a/arch/arm/boot/dts/uniphier-ph1-pro4.dtsi
+++ b/arch/arm/boot/dts/uniphier-ph1-pro4.dtsi
@@ -148,6 +148,12 @@
interrupts = <0 81 4>;
};
+ pinctrl: pinctrl@5f801000 {
+ compatible = "socionext,ph1-pro4-pinctrl",
+ "syscon";
+ reg = <0x5f801000 0xe00>;
+ };
+
timer@60000200 {
compatible = "arm,cortex-a9-global-timer";
reg = <0x60000200 0x20>;
diff --git a/arch/arm/boot/dts/uniphier-ph1-sld8.dtsi b/arch/arm/boot/dts/uniphier-ph1-sld8.dtsi
index 325515776a47..8dff3c422a34 100644
--- a/arch/arm/boot/dts/uniphier-ph1-sld8.dtsi
+++ b/arch/arm/boot/dts/uniphier-ph1-sld8.dtsi
@@ -148,6 +148,12 @@
interrupts = <0 82 4>;
};
+ pinctrl: pinctrl@5f801000 {
+ compatible = "socionext,ph1-sld8-pinctrl",
+ "syscon";
+ reg = <0x5f801000 0xe00>;
+ };
+
timer@60000200 {
compatible = "arm,cortex-a9-global-timer";
reg = <0x60000200 0x20>;