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authorLars Povlsen <lars.povlsen@microchip.com>2020-05-13 15:55:19 +0300
committerLinus Walleij <linus.walleij@linaro.org>2020-05-18 10:28:51 +0300
commit550713e33f4338c8596776828a936fd1e3bf35de (patch)
treee5d04872c7cc3eb2e28d58d6565e44e10f28107d
parent5d590738521e25b183172c32aab6ee71b9366dca (diff)
downloadlinux-550713e33f4338c8596776828a936fd1e3bf35de.tar.xz
pinctrl: ocelot: Always register GPIO driver
This fixes the situation where the GPIO controller is not used as an interrupt controller as well. Previously, the driver would silently fail to register even the GPIO's. With this change, the driver will only register as an interrupt controller if a parent interrupt is provided. Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com> Link: https://lore.kernel.org/r/20200513125532.24585-2-lars.povlsen@microchip.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-rw-r--r--drivers/pinctrl/pinctrl-ocelot.c30
1 files changed, 15 insertions, 15 deletions
diff --git a/drivers/pinctrl/pinctrl-ocelot.c b/drivers/pinctrl/pinctrl-ocelot.c
index ed8eac6c1494..d4ac65b1efc0 100644
--- a/drivers/pinctrl/pinctrl-ocelot.c
+++ b/drivers/pinctrl/pinctrl-ocelot.c
@@ -751,21 +751,21 @@ static int ocelot_gpiochip_register(struct platform_device *pdev,
gc->of_node = info->dev->of_node;
gc->label = "ocelot-gpio";
- irq = irq_of_parse_and_map(pdev->dev.of_node, 0);
- if (irq <= 0)
- return irq;
-
- girq = &gc->irq;
- girq->chip = &ocelot_irqchip;
- girq->parent_handler = ocelot_irq_handler;
- girq->num_parents = 1;
- girq->parents = devm_kcalloc(&pdev->dev, 1, sizeof(*girq->parents),
- GFP_KERNEL);
- if (!girq->parents)
- return -ENOMEM;
- girq->parents[0] = irq;
- girq->default_type = IRQ_TYPE_NONE;
- girq->handler = handle_edge_irq;
+ irq = irq_of_parse_and_map(gc->of_node, 0);
+ if (irq) {
+ girq = &gc->irq;
+ girq->chip = &ocelot_irqchip;
+ girq->parent_handler = ocelot_irq_handler;
+ girq->num_parents = 1;
+ girq->parents = devm_kcalloc(&pdev->dev, 1,
+ sizeof(*girq->parents),
+ GFP_KERNEL);
+ if (!girq->parents)
+ return -ENOMEM;
+ girq->parents[0] = irq;
+ girq->default_type = IRQ_TYPE_NONE;
+ girq->handler = handle_edge_irq;
+ }
ret = devm_gpiochip_add_data(&pdev->dev, gc, info);
if (ret)