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authorKavyasree Kotagiri <kavyasree.kotagiri@microchip.com>2021-11-18 14:25:47 +0300
committerLinus Walleij <linus.walleij@linaro.org>2021-11-22 01:45:09 +0300
commit463201a784c45cd5413ecd0dfbe80224489b7ea5 (patch)
tree94381715ff1cfa570991c42f3c53f35d542e0d48
parentcc4dac3f5e3eff8d042b4d8712bed6f7ea75454c (diff)
downloadlinux-463201a784c45cd5413ecd0dfbe80224489b7ea5.tar.xz
dt-bindings: pinctrl: ocelot: add lan966x SoC support
Add documentation for the compatible designated for lan966x. Signed-off-by: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211118112548.14582-2-kavyasree.kotagiri@microchip.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-rw-r--r--Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.txt3
1 files changed, 2 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.txt
index db99bd95d423..3bb76487669f 100644
--- a/Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.txt
@@ -4,7 +4,8 @@ Microsemi Ocelot pin controller Device Tree Bindings
Required properties:
- compatible : Should be "mscc,ocelot-pinctrl",
"mscc,jaguar2-pinctrl", "microchip,sparx5-pinctrl",
- "mscc,luton-pinctrl" or "mscc,serval-pinctrl"
+ "mscc,luton-pinctrl", "mscc,serval-pinctrl" or
+ "microchip,lan966x-pinctrl"
- reg : Address and length of the register set for the device
- gpio-controller : Indicates this device is a GPIO controller
- #gpio-cells : Must be 2.