summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorMasahiro Yamada <yamada.masahiro@socionext.com>2018-01-17 19:28:10 +0300
committerUlf Hansson <ulf.hansson@linaro.org>2018-03-05 11:09:04 +0300
commit218f6024abec04ec78e56b6761f70d404bab8637 (patch)
tree1f89a998f3dba7d8ffa5b1262fad3a6492d8361d
parent7c53b79766a463a97dd013715a1cc8a2802f6448 (diff)
downloadlinux-218f6024abec04ec78e56b6761f70d404bab8637.tar.xz
mmc: tmio: remove TMIO_MMC_WRPROTECT_DISABLE
The use of this flag has been replaced with MMC_CAP2_NO_WRITE_PROTECT. No platform defines this flag any more. Remove. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Lee Jones <lee.jones@linaro.org> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
-rw-r--r--drivers/mmc/host/tmio_mmc_core.c5
-rw-r--r--include/linux/mfd/tmio.h1
2 files changed, 2 insertions, 4 deletions
diff --git a/drivers/mmc/host/tmio_mmc_core.c b/drivers/mmc/host/tmio_mmc_core.c
index 1497da07e33c..fb5a29c93ec5 100644
--- a/drivers/mmc/host/tmio_mmc_core.c
+++ b/drivers/mmc/host/tmio_mmc_core.c
@@ -1061,10 +1061,9 @@ static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
static int tmio_mmc_get_ro(struct mmc_host *mmc)
{
struct tmio_mmc_host *host = mmc_priv(mmc);
- struct tmio_mmc_data *pdata = host->pdata;
- return !((pdata->flags & TMIO_MMC_WRPROTECT_DISABLE) ||
- (sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) & TMIO_STAT_WRPROTECT));
+ return !(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) &
+ TMIO_STAT_WRPROTECT);
}
static int tmio_multi_io_quirk(struct mmc_card *card,
diff --git a/include/linux/mfd/tmio.h b/include/linux/mfd/tmio.h
index 396a103c8bc6..91f92215ca74 100644
--- a/include/linux/mfd/tmio.h
+++ b/include/linux/mfd/tmio.h
@@ -36,7 +36,6 @@
} while (0)
/* tmio MMC platform flags */
-#define TMIO_MMC_WRPROTECT_DISABLE BIT(0)
/*
* Some controllers can support a 2-byte block size when the bus width
* is configured in 4-bit mode.