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author | Maxime Ripard <maxime.ripard@bootlin.com> | 2019-05-20 17:50:36 +0300 |
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committer | Maxime Ripard <maxime.ripard@bootlin.com> | 2019-05-21 17:29:15 +0300 |
commit | 17996e5b0ba40c4d85500e1c9bfbddaf676ab8c7 (patch) | |
tree | de32c073cead2c7c5271c407c3c907705530959a | |
parent | ca0961011db57e39880df0b5708df8aa3339dc6f (diff) | |
download | linux-17996e5b0ba40c4d85500e1c9bfbddaf676ab8c7.tar.xz |
ARM: dts: sun6i: Add default address and size cells for SPI
The SPI controller bindings require an address cell size of 1, and a size
cell size of 0. Let's put it at the DTSI level to make sure that's properly
enforced.
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
-rw-r--r-- | arch/arm/boot/dts/sun6i-a31.dtsi | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi index c04efad81bbc..a57cbf33c12f 100644 --- a/arch/arm/boot/dts/sun6i-a31.dtsi +++ b/arch/arm/boot/dts/sun6i-a31.dtsi @@ -987,6 +987,8 @@ dma-names = "rx", "tx"; resets = <&ccu RST_AHB1_SPI0>; status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; }; spi1: spi@1c69000 { @@ -999,6 +1001,8 @@ dma-names = "rx", "tx"; resets = <&ccu RST_AHB1_SPI1>; status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; }; spi2: spi@1c6a000 { @@ -1011,6 +1015,8 @@ dma-names = "rx", "tx"; resets = <&ccu RST_AHB1_SPI2>; status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; }; spi3: spi@1c6b000 { @@ -1023,6 +1029,8 @@ dma-names = "rx", "tx"; resets = <&ccu RST_AHB1_SPI3>; status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; }; gic: interrupt-controller@1c81000 { |