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author | Arnd Bergmann <arnd@arndb.de> | 2014-09-25 19:53:39 +0400 |
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committer | Arnd Bergmann <arnd@arndb.de> | 2014-09-25 19:53:39 +0400 |
commit | 14b62fb0159a77989708370ca8c8ba5db55c1dab (patch) | |
tree | ebac8083a32c738074797e0a6ae50e5ffe41eb83 | |
parent | e36087998a3b01f3c6c93fa9465e40103f427315 (diff) | |
parent | d37aba521379203b740a2929e6e6f6bd2485f5d7 (diff) | |
download | linux-14b62fb0159a77989708370ca8c8ba5db55c1dab.tar.xz |
Merge tag 'tegra-for-3.18-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/soc
Pull "ARM: tegra: core SoC code changes for 3.18" from Stephen Warren:
the primary change here gets its address information from DT rather than
iomap.h. This removes one more user of iomap.h, and will help allow the
code to move to a location that can be shared between arch/arm and
arch/arm64.
An unused header file was also removed.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* tag 'tegra-for-3.18-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
ARM: tegra: remove unused tegra_emc.h
ARM: tegra: Initialize flow controller from DT
of: Add NVIDIA Tegra flow controller bindings
-rw-r--r-- | Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-flowctrl.txt | 12 | ||||
-rw-r--r-- | arch/arm/mach-tegra/flowctrl.c | 44 | ||||
-rw-r--r-- | arch/arm/mach-tegra/flowctrl.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-tegra/tegra.c | 2 | ||||
-rw-r--r-- | include/linux/platform_data/tegra_emc.h | 34 |
5 files changed, 53 insertions, 41 deletions
diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-flowctrl.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-flowctrl.txt new file mode 100644 index 000000000000..ccf0adddc820 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-flowctrl.txt @@ -0,0 +1,12 @@ +NVIDIA Tegra Flow Controller + +Required properties: +- compatible: Should be "nvidia,tegra<chip>-flowctrl" +- reg: Should contain one register range (address and length) + +Example: + + flow-controller@60007000 { + compatible = "nvidia,tegra20-flowctrl"; + reg = <0x60007000 0x1000>; + }; diff --git a/arch/arm/mach-tegra/flowctrl.c b/arch/arm/mach-tegra/flowctrl.c index ec55d1de1b55..475e783992fd 100644 --- a/arch/arm/mach-tegra/flowctrl.c +++ b/arch/arm/mach-tegra/flowctrl.c @@ -22,11 +22,12 @@ #include <linux/init.h> #include <linux/io.h> #include <linux/kernel.h> +#include <linux/of.h> +#include <linux/of_address.h> #include <soc/tegra/fuse.h> #include "flowctrl.h" -#include "iomap.h" static u8 flowctrl_offset_halt_cpu[] = { FLOW_CTRL_HALT_CPU0_EVENTS, @@ -42,23 +43,22 @@ static u8 flowctrl_offset_cpu_csr[] = { FLOW_CTRL_CPU1_CSR + 16, }; +static void __iomem *tegra_flowctrl_base; + static void flowctrl_update(u8 offset, u32 value) { - void __iomem *addr = IO_ADDRESS(TEGRA_FLOW_CTRL_BASE) + offset; - - writel(value, addr); + writel(value, tegra_flowctrl_base + offset); /* ensure the update has reached the flow controller */ wmb(); - readl_relaxed(addr); + readl_relaxed(tegra_flowctrl_base + offset); } u32 flowctrl_read_cpu_csr(unsigned int cpuid) { u8 offset = flowctrl_offset_cpu_csr[cpuid]; - void __iomem *addr = IO_ADDRESS(TEGRA_FLOW_CTRL_BASE) + offset; - return readl(addr); + return readl(tegra_flowctrl_base + offset); } void flowctrl_write_cpu_csr(unsigned int cpuid, u32 value) @@ -139,3 +139,33 @@ void flowctrl_cpu_suspend_exit(unsigned int cpuid) reg |= FLOW_CTRL_CSR_EVENT_FLAG; /* clear event */ flowctrl_write_cpu_csr(cpuid, reg); } + +static const struct of_device_id matches[] __initconst = { + { .compatible = "nvidia,tegra124-flowctrl" }, + { .compatible = "nvidia,tegra114-flowctrl" }, + { .compatible = "nvidia,tegra30-flowctrl" }, + { .compatible = "nvidia,tegra20-flowctrl" }, + { } +}; + +void __init tegra_flowctrl_init(void) +{ + /* hardcoded fallback if device tree node is missing */ + unsigned long base = 0x60007000; + unsigned long size = SZ_4K; + struct device_node *np; + + np = of_find_matching_node(NULL, matches); + if (np) { + struct resource res; + + if (of_address_to_resource(np, 0, &res) == 0) { + size = resource_size(&res); + base = res.start; + } + + of_node_put(np); + } + + tegra_flowctrl_base = ioremap_nocache(base, size); +} diff --git a/arch/arm/mach-tegra/flowctrl.h b/arch/arm/mach-tegra/flowctrl.h index c89aac60a143..73a9c5016c1a 100644 --- a/arch/arm/mach-tegra/flowctrl.h +++ b/arch/arm/mach-tegra/flowctrl.h @@ -59,6 +59,8 @@ void flowctrl_write_cpu_halt(unsigned int cpuid, u32 value); void flowctrl_cpu_suspend_enter(unsigned int cpuid); void flowctrl_cpu_suspend_exit(unsigned int cpuid); + +void tegra_flowctrl_init(void); #endif #endif diff --git a/arch/arm/mach-tegra/tegra.c b/arch/arm/mach-tegra/tegra.c index 5ef5173dec83..ef016af1c9e7 100644 --- a/arch/arm/mach-tegra/tegra.c +++ b/arch/arm/mach-tegra/tegra.c @@ -48,6 +48,7 @@ #include "board.h" #include "common.h" #include "cpuidle.h" +#include "flowctrl.h" #include "iomap.h" #include "irq.h" #include "pm.h" @@ -74,6 +75,7 @@ static void __init tegra_init_early(void) { of_register_trusted_foundations(); tegra_cpu_reset_handler_init(); + tegra_flowctrl_init(); } static void __init tegra_dt_init_irq(void) diff --git a/include/linux/platform_data/tegra_emc.h b/include/linux/platform_data/tegra_emc.h deleted file mode 100644 index df67505e98f8..000000000000 --- a/include/linux/platform_data/tegra_emc.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * Copyright (C) 2011 Google, Inc. - * - * Author: - * Colin Cross <ccross@android.com> - * Olof Johansson <olof@lixom.net> - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef __TEGRA_EMC_H_ -#define __TEGRA_EMC_H_ - -#define TEGRA_EMC_NUM_REGS 46 - -struct tegra_emc_table { - unsigned long rate; - u32 regs[TEGRA_EMC_NUM_REGS]; -}; - -struct tegra_emc_pdata { - int num_tables; - struct tegra_emc_table *tables; -}; - -#endif |