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authorAndy Chiu <andy.chiu@sifive.com>2024-05-09 19:26:54 +0300
committerPalmer Dabbelt <palmer@rivosinc.com>2024-05-31 00:33:07 +0300
commit037df2966afc8dfaa06788245cffca345dcf9a26 (patch)
tree554d030518e3783d19d595b130f43f002fa06c5a
parent98a5700dfaec1043c8b69eb25f44896be557dd4c (diff)
downloadlinux-037df2966afc8dfaa06788245cffca345dcf9a26.tar.xz
dt-bindings: riscv: add Zve32[xf] Zve64[xfd] ISA extension description
Add description for Zve32x Zve32f Zve64x Zve64f Zve64d ISA extensions. Signed-off-by: Andy Chiu <andy.chiu@sifive.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20240510-zve-detection-v5-4-0711bdd26c12@sifive.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
-rw-r--r--Documentation/devicetree/bindings/riscv/extensions.yaml30
1 files changed, 30 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml
index 468c646247aa..cfed80ad5540 100644
--- a/Documentation/devicetree/bindings/riscv/extensions.yaml
+++ b/Documentation/devicetree/bindings/riscv/extensions.yaml
@@ -381,6 +381,36 @@ properties:
instructions, as ratified in commit 56ed795 ("Update
riscv-crypto-spec-vector.adoc") of riscv-crypto.
+ - const: zve32f
+ description:
+ The standard Zve32f extension for embedded processors, as ratified
+ in commit 6f702a2 ("Vector extensions are now ratified") of
+ riscv-v-spec.
+
+ - const: zve32x
+ description:
+ The standard Zve32x extension for embedded processors, as ratified
+ in commit 6f702a2 ("Vector extensions are now ratified") of
+ riscv-v-spec.
+
+ - const: zve64d
+ description:
+ The standard Zve64d extension for embedded processors, as ratified
+ in commit 6f702a2 ("Vector extensions are now ratified") of
+ riscv-v-spec.
+
+ - const: zve64f
+ description:
+ The standard Zve64f extension for embedded processors, as ratified
+ in commit 6f702a2 ("Vector extensions are now ratified") of
+ riscv-v-spec.
+
+ - const: zve64x
+ description:
+ The standard Zve64x extension for embedded processors, as ratified
+ in commit 6f702a2 ("Vector extensions are now ratified") of
+ riscv-v-spec.
+
- const: zvfh
description:
The standard Zvfh extension for vectored half-precision