summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorGreentime Hu <greentime@andestech.com>2017-12-04 06:26:02 +0300
committerGreentime Hu <greentime@andestech.com>2018-02-22 05:44:36 +0300
commit68d87861029a60425e6f1b27c8986e9d39d5b0c7 (patch)
treeb0d18c5dcc2698028e7b985a9196447df9628248
parent8f7726d251f381bfad185d3e7a2d60e0bff48acc (diff)
downloadlinux-68d87861029a60425e6f1b27c8986e9d39d5b0c7.tar.xz
dt-bindings: nds32 SoC Bindings
This patch adds nds32 SoC(AE3XX and AG101P) binding documents. Signed-off-by: Greentime Hu <greentime@andestech.com> Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Arnd Bergmann <arnd@arndb.de>
-rw-r--r--Documentation/devicetree/bindings/nds32/andestech-boards40
1 files changed, 40 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/nds32/andestech-boards b/Documentation/devicetree/bindings/nds32/andestech-boards
new file mode 100644
index 000000000000..f5d75693e3c7
--- /dev/null
+++ b/Documentation/devicetree/bindings/nds32/andestech-boards
@@ -0,0 +1,40 @@
+Andestech(nds32) AE3XX Platform
+-----------------------------------------------------------------------------
+The AE3XX prototype demonstrates the AE3XX example platform on the FPGA. It
+is composed of one Andestech(nds32) processor and AE3XX.
+
+Required properties (in root node):
+- compatible = "andestech,ae3xx";
+
+Example:
+/dts-v1/;
+/ {
+ compatible = "andestech,ae3xx";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ interrupt-parent = <&intc>;
+};
+
+Andestech(nds32) AG101P Platform
+-----------------------------------------------------------------------------
+AG101P is a generic SoC Platform IP that works with any of Andestech(nds32)
+processors to provide a cost-effective and high performance solution for
+majority of embedded systems in variety of application domains. Users may
+simply attach their IP on one of the system buses together with certain glue
+logics to complete a SoC solution for a specific application. With
+comprehensive simulation and design environments, users may evaluate the
+system performance of their applications and track bugs of their designs
+efficiently. The optional hardware development platform further provides real
+system environment for early prototyping and software/hardware co-development.
+
+Required properties (in root node):
+ compatible = "andestech,ag101p";
+
+Example:
+/dts-v1/;
+/ {
+ compatible = "andestech,ag101p";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ interrupt-parent = <&intc>;
+};