[WIP] dt-bindings: clock: starfive: Add preliminary JH7100 bindings

Add preliminary Device Tree bindings for the StarFive JH7100 Clock
Generator.

To be verified against documentation when it becomes available.

Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>

1 files changed, 52 insertions, 0 deletions

diff --git a/Documentation/devicetree/bindings/clock/starfive,jh7100-clkgen.yaml b/Documentation/devicetree/bindings/clock/starfive,jh7100-clkgen.yaml
new file mode 100644
index 000000000000..9e88ac647ae2
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/starfive,jh7100-clkgen.yaml
@@ -0,0 +1,52 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/starfive,jh7100-clkgen.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: StarFive JH7100 Clock Generator
+
+maintainers:
+  - FIXME <someone@starfivetech.com>
+  - Geert Uytterhoeven <geert@linux-m68k.org>
+
+properties:
+  compatible:
+    const: starfive,jh7100-clkgen
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    items:
+      - description: Main clock source (default 25 MHz)
+      - description: Application-specific clock source (12-27 MHz)
+
+  clock-names:
+    items:
+      - const: osc0
+      - const: osc1
+
+  '#clock-cells':
+    const: 1
+    description:
+      See <dt-bindings/clock/starfive-jh7100-clkgen.h> for valid indices.
+
+required:
+  - compatible
+  - reg
+  - clocks
+  - clock-names
+  - '#clock-cells'
+
+additionalProperties: false
+
+examples:
+  - |
+    clkgen: clock-controller@11800000 {
+            compatible = "starfive,jh7100-clkgen";
+            reg = <0x11800000 0x10000>;
+            clocks = <&osc0_clk>, <&osc1_clk>;
+            clock-names = "osc0", "osc1";
+            #clock-cells = <1>;
+    };