diff options
| author | Emil Renner Berthing <kernel@esmil.dk> | 2021-11-20 23:33:08 +0300 |
|---|---|---|
| committer | Jianlong Huang <jianlong.huang@starfivetech.com> | 2022-06-13 06:39:13 +0300 |
| commit | 838ed442d954cbaf2e43d4c408c4fcc4f25c7a6e (patch) | |
| tree | f08a118f3f592274ef5753428447eb9bc2fb0ea9 | |
| parent | 390947157e86c0e4d66cdb8dfb24dab27ea48dcb (diff) | |
| download | linux-838ed442d954cbaf2e43d4c408c4fcc4f25c7a6e.tar.xz | |
RISC-V: Add StarFive JH7100 audio reset node
Add device tree node for the audio resets on the StarFive JH7100 RISC-V
SoC.
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
| -rwxr-xr-x | arch/riscv/boot/dts/starfive/jh7100.dtsi | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/riscv/boot/dts/starfive/jh7100.dtsi b/arch/riscv/boot/dts/starfive/jh7100.dtsi index a49301fbff97..be12a63438c3 100755 --- a/arch/riscv/boot/dts/starfive/jh7100.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7100.dtsi @@ -282,6 +282,12 @@ #clock-cells = <1>; }; + audrst: reset-controller@10490000 { + compatible = "starfive,jh7100-audrst"; + reg = <0x0 0x10490000 0x0 0x10000>; + #reset-cells = <1>; + }; + clkgen: clock-controller@11800000 { compatible = "starfive,jh7100-clkgen"; reg = <0x0 0x11800000 0x0 0x10000>; @@ -767,12 +773,6 @@ dma-names = "tx"; }; - audrst: reset-controller@10490000 { - compatible = "starfive,jh7100-audrst"; - reg = <0x0 0x10490000 0x0 0x10000>; - #reset-cells = <1>; - }; - spdif_transmitter: spdif_transmitter { compatible = "linux,spdif-dit"; #sound-dai-cells = <0>; |