diff options
author | Michael Chan <mchan@broadcom.com> | 2009-04-05 03:51:14 +0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2009-04-05 03:51:14 +0400 |
commit | 57579f7629a3d46c307405fbd2ea6bdb650d692f (patch) | |
tree | c407da542bfa50989bfc4f41daf7c1a181207d93 | |
parent | 5d4d9e8ad6c646c4811bf0049df761dee6affc3d (diff) | |
download | linux-57579f7629a3d46c307405fbd2ea6bdb650d692f.tar.xz |
bnx2: Use request_firmware()
Based on original patch by Ben Hutchings <ben@decadent.org.uk> and
Bastian Blank <waldi@debian.org>, with the following main changes:
Separated the mips firmware and rv2p firmware into different files
to make it easier to update them separately.
Added some code to fixup the rv2p code with run-time information
such as PAGE_SIZE.
Update version to 2.0.0.
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r-- | drivers/net/Kconfig | 2 | ||||
-rw-r--r-- | drivers/net/bnx2.c | 351 | ||||
-rw-r--r-- | drivers/net/bnx2.h | 71 | ||||
-rw-r--r-- | drivers/net/bnx2_fw.h | 4378 | ||||
-rw-r--r-- | drivers/net/bnx2_fw2.h | 4547 | ||||
-rw-r--r-- | firmware/Makefile | 4 | ||||
-rw-r--r-- | firmware/WHENCE | 20 | ||||
-rw-r--r-- | firmware/bnx2/bnx2-mips-06-4.6.16.fw.ihex | 5805 | ||||
-rw-r--r-- | firmware/bnx2/bnx2-mips-09-4.6.17.fw.ihex | 5816 | ||||
-rw-r--r-- | firmware/bnx2/bnx2-rv2p-06-4.6.16.fw.ihex | 441 | ||||
-rw-r--r-- | firmware/bnx2/bnx2-rv2p-09-4.6.15.fw.ihex | 490 |
11 files changed, 12823 insertions, 9102 deletions
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 16899eee397e..9e7baec45720 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -2234,7 +2234,7 @@ config BNX2 tristate "Broadcom NetXtremeII support" depends on PCI select CRC32 - select ZLIB_INFLATE + select FW_LOADER help This driver supports Broadcom NetXtremeII gigabit Ethernet cards. diff --git a/drivers/net/bnx2.c b/drivers/net/bnx2.c index ad446db8e186..17cbc8c6be37 100644 --- a/drivers/net/bnx2.c +++ b/drivers/net/bnx2.c @@ -46,19 +46,20 @@ #include <linux/crc32.h> #include <linux/prefetch.h> #include <linux/cache.h> -#include <linux/zlib.h> +#include <linux/firmware.h> #include <linux/log2.h> #include "bnx2.h" #include "bnx2_fw.h" -#include "bnx2_fw2.h" - -#define FW_BUF_SIZE 0x10000 #define DRV_MODULE_NAME "bnx2" #define PFX DRV_MODULE_NAME ": " -#define DRV_MODULE_VERSION "1.9.3" -#define DRV_MODULE_RELDATE "March 17, 2009" +#define DRV_MODULE_VERSION "2.0.0" +#define DRV_MODULE_RELDATE "April 2, 2009" +#define FW_MIPS_FILE_06 "bnx2/bnx2-mips-06-4.6.16.fw" +#define FW_RV2P_FILE_06 "bnx2/bnx2-rv2p-06-4.6.16.fw" +#define FW_MIPS_FILE_09 "bnx2/bnx2-mips-09-4.6.17.fw" +#define FW_RV2P_FILE_09 "bnx2/bnx2-rv2p-09-4.6.15.fw" #define RUN_AT(x) (jiffies + (x)) @@ -72,6 +73,10 @@ MODULE_AUTHOR("Michael Chan <mchan@broadcom.com>"); MODULE_DESCRIPTION("Broadcom NetXtreme II BCM5706/5708/5709/5716 Driver"); MODULE_LICENSE("GPL"); MODULE_VERSION(DRV_MODULE_VERSION); +MODULE_FIRMWARE(FW_MIPS_FILE_06); +MODULE_FIRMWARE(FW_RV2P_FILE_06); +MODULE_FIRMWARE(FW_MIPS_FILE_09); +MODULE_FIRMWARE(FW_RV2P_FILE_09); static int disable_msi = 0; @@ -3391,33 +3396,143 @@ bnx2_set_rx_mode(struct net_device *dev) spin_unlock_bh(&bp->phy_lock); } -static void -load_rv2p_fw(struct bnx2 *bp, __le32 *rv2p_code, u32 rv2p_code_len, - u32 rv2p_proc) +static int __devinit +check_fw_section(const struct firmware *fw, + const struct bnx2_fw_file_section *section, + u32 alignment, bool non_empty) +{ + u32 offset = be32_to_cpu(section->offset); + u32 len = be32_to_cpu(section->len); + + if ((offset == 0 && len != 0) || offset >= fw->size || offset & 3) + return -EINVAL; + if ((non_empty && len == 0) || len > fw->size - offset || + len & (alignment - 1)) + return -EINVAL; + return 0; +} + +static int __devinit +check_mips_fw_entry(const struct firmware *fw, + const struct bnx2_mips_fw_file_entry *entry) +{ + if (check_fw_section(fw, &entry->text, 4, true) || + check_fw_section(fw, &entry->data, 4, false) || + check_fw_section(fw, &entry->rodata, 4, false)) + return -EINVAL; + return 0; +} + +static int __devinit +bnx2_request_firmware(struct bnx2 *bp) { + const char *mips_fw_file, *rv2p_fw_file; + const struct bnx2_mips_fw_file *mips; + const struct bnx2_rv2p_fw_file *rv2p; + int rc; + + if (CHIP_NUM(bp) == CHIP_NUM_5709) { + mips_fw_file = FW_MIPS_FILE_09; + rv2p_fw_file = FW_RV2P_FILE_09; + } else { + mips_fw_file = FW_MIPS_FILE_06; + rv2p_fw_file = FW_RV2P_FILE_06; + } + + rc = request_firmware(&bp->mips_firmware, mips_fw_file, &bp->pdev->dev); + if (rc) { + printk(KERN_ERR PFX "Can't load firmware file \"%s\"\n", + mips_fw_file); + return rc; + } + + rc = request_firmware(&bp->rv2p_firmware, rv2p_fw_file, &bp->pdev->dev); + if (rc) { + printk(KERN_ERR PFX "Can't load firmware file \"%s\"\n", + rv2p_fw_file); + return rc; + } + mips = (const struct bnx2_mips_fw_file *) bp->mips_firmware->data; + rv2p = (const struct bnx2_rv2p_fw_file *) bp->rv2p_firmware->data; + if (bp->mips_firmware->size < sizeof(*mips) || + check_mips_fw_entry(bp->mips_firmware, &mips->com) || + check_mips_fw_entry(bp->mips_firmware, &mips->cp) || + check_mips_fw_entry(bp->mips_firmware, &mips->rxp) || + check_mips_fw_entry(bp->mips_firmware, &mips->tpat) || + check_mips_fw_entry(bp->mips_firmware, &mips->txp)) { + printk(KERN_ERR PFX "Firmware file \"%s\" is invalid\n", + mips_fw_file); + return -EINVAL; + } + if (bp->rv2p_firmware->size < sizeof(*rv2p) || + check_fw_section(bp->rv2p_firmware, &rv2p->proc1.rv2p, 8, true) || + check_fw_section(bp->rv2p_firmware, &rv2p->proc2.rv2p, 8, true)) { + printk(KERN_ERR PFX "Firmware file \"%s\" is invalid\n", + rv2p_fw_file); + return -EINVAL; + } + + return 0; +} + +static u32 +rv2p_fw_fixup(u32 rv2p_proc, int idx, u32 loc, u32 rv2p_code) +{ + switch (idx) { + case RV2P_P1_FIXUP_PAGE_SIZE_IDX: + rv2p_code &= ~RV2P_BD_PAGE_SIZE_MSK; + rv2p_code |= RV2P_BD_PAGE_SIZE; + break; + } + return rv2p_code; +} + +static int +load_rv2p_fw(struct bnx2 *bp, u32 rv2p_proc, + const struct bnx2_rv2p_fw_file_entry *fw_entry) +{ + u32 rv2p_code_len, file_offset; + __be32 *rv2p_code; int i; - u32 val; + u32 val, cmd, addr; + + rv2p_code_len = be32_to_cpu(fw_entry->rv2p.len); + file_offset = be32_to_cpu(fw_entry->rv2p.offset); + + rv2p_code = (__be32 *)(bp->rv2p_firmware->data + file_offset); - if (rv2p_proc == RV2P_PROC2 && CHIP_NUM(bp) == CHIP_NUM_5709) { - val = le32_to_cpu(rv2p_code[XI_RV2P_PROC2_MAX_BD_PAGE_LOC]); - val &= ~XI_RV2P_PROC2_BD_PAGE_SIZE_MSK; - val |= XI_RV2P_PROC2_BD_PAGE_SIZE; - rv2p_code[XI_RV2P_PROC2_MAX_BD_PAGE_LOC] = cpu_to_le32(val); + if (rv2p_proc == RV2P_PROC1) { + cmd = BNX2_RV2P_PROC1_ADDR_CMD_RDWR; + addr = BNX2_RV2P_PROC1_ADDR_CMD; + } else { + cmd = BNX2_RV2P_PROC2_ADDR_CMD_RDWR; + addr = BNX2_RV2P_PROC2_ADDR_CMD; } for (i = 0; i < rv2p_code_len; i += 8) { - REG_WR(bp, BNX2_RV2P_INSTR_HIGH, le32_to_cpu(*rv2p_code)); + REG_WR(bp, BNX2_RV2P_INSTR_HIGH, be32_to_cpu(*rv2p_code)); rv2p_code++; - REG_WR(bp, BNX2_RV2P_INSTR_LOW, le32_to_cpu(*rv2p_code)); + REG_WR(bp, BNX2_RV2P_INSTR_LOW, be32_to_cpu(*rv2p_code)); rv2p_code++; - if (rv2p_proc == RV2P_PROC1) { - val = (i / 8) | BNX2_RV2P_PROC1_ADDR_CMD_RDWR; - REG_WR(bp, BNX2_RV2P_PROC1_ADDR_CMD, val); - } - else { - val = (i / 8) | BNX2_RV2P_PROC2_ADDR_CMD_RDWR; - REG_WR(bp, BNX2_RV2P_PROC2_ADDR_CMD, val); + val = (i / 8) | cmd; + REG_WR(bp, addr, val); + } + + rv2p_code = (__be32 *)(bp->rv2p_firmware->data + file_offset); + for (i = 0; i < 8; i++) { + u32 loc, code; + + loc = be32_to_cpu(fw_entry->fixup[i]); + if (loc && ((loc * 4) < rv2p_code_len)) { + code = be32_to_cpu(*(rv2p_code + loc - 1)); + REG_WR(bp, BNX2_RV2P_INSTR_HIGH, code); + code = be32_to_cpu(*(rv2p_code + loc)); + code = rv2p_fw_fixup(rv2p_proc, i, loc, code); + REG_WR(bp, BNX2_RV2P_INSTR_LOW, code); + + val = (loc / 2) | cmd; + REG_WR(bp, addr, val); } } @@ -3428,14 +3543,18 @@ load_rv2p_fw(struct bnx2 *bp, __le32 *rv2p_code, u32 rv2p_code_len, else { REG_WR(bp, BNX2_RV2P_COMMAND, BNX2_RV2P_COMMAND_PROC2_RESET); } + + return 0; } static int -load_cpu_fw(struct bnx2 *bp, const struct cpu_reg *cpu_reg, struct fw_info *fw) +load_cpu_fw(struct bnx2 *bp, const struct cpu_reg *cpu_reg, + const struct bnx2_mips_fw_file_entry *fw_entry) { + u32 addr, len, file_offset; + __be32 *data; u32 offset; u32 val; - int rc; /* Halt the CPU. */ val = bnx2_reg_rd_ind(bp, cpu_reg->mode); @@ -3444,64 +3563,52 @@ load_cpu_fw(struct bnx2 *bp, const struct cpu_reg *cpu_reg, struct fw_info *fw) bnx2_reg_wr_ind(bp, cpu_reg->state, cpu_reg->state_value_clear); /* Load the Text area. */ - offset = cpu_reg->spad_base + (fw->text_addr - cpu_reg->mips_view_base); - if (fw->gz_text) { - int j; - - rc = zlib_inflate_blob(fw->text, FW_BUF_SIZE, fw->gz_text, - fw->gz_text_len); - if (rc < 0) - return rc; + addr = be32_to_cpu(fw_entry->text.addr); + len = be32_to_cpu(fw_entry->text.len); + file_offset = be32_to_cpu(fw_entry->text.offset); + data = (__be32 *)(bp->mips_firmware->data + file_offset); - for (j = 0; j < (fw->text_len / 4); j++, offset += 4) { - bnx2_reg_wr_ind(bp, offset, le32_to_cpu(fw->text[j])); - } - } - - /* Load the Data area. */ - offset = cpu_reg->spad_base + (fw->data_addr - cpu_reg->mips_view_base); - if (fw->data) { + offset = cpu_reg->spad_base + (addr - cpu_reg->mips_view_base); + if (len) { int j; - for (j = 0; j < (fw->data_len / 4); j++, offset += 4) { - bnx2_reg_wr_ind(bp, offset, fw->data[j]); - } + for (j = 0; j < (len / 4); j++, offset += 4) + bnx2_reg_wr_ind(bp, offset, be32_to_cpu(data[j])); } - /* Load the SBSS area. */ - offset = cpu_reg->spad_base + (fw->sbss_addr - cpu_reg->mips_view_base); - if (fw->sbss_len) { - int j; - - for (j = 0; j < (fw->sbss_len / 4); j++, offset += 4) { - bnx2_reg_wr_ind(bp, offset, 0); - } - } + /* Load the Data area. */ + addr = be32_to_cpu(fw_entry->data.addr); + len = be32_to_cpu(fw_entry->data.len); + file_offset = be32_to_cpu(fw_entry->data.offset); + data = (__be32 *)(bp->mips_firmware->data + file_offset); - /* Load the BSS area. */ - offset = cpu_reg->spad_base + (fw->bss_addr - cpu_reg->mips_view_base); - if (fw->bss_len) { + offset = cpu_reg->spad_base + (addr - cpu_reg->mips_view_base); + if (len) { int j; - for (j = 0; j < (fw->bss_len/4); j++, offset += 4) { - bnx2_reg_wr_ind(bp, offset, 0); - } + for (j = 0; j < (len / 4); j++, offset += 4) + bnx2_reg_wr_ind(bp, offset, be32_to_cpu(data[j])); } /* Load the Read-Only area. */ - offset = cpu_reg->spad_base + - (fw->rodata_addr - cpu_reg->mips_view_base); - if (fw->rodata) { + addr = be32_to_cpu(fw_entry->rodata.addr); + len = be32_to_cpu(fw_entry->rodata.len); + file_offset = be32_to_cpu(fw_entry->rodata.offset); + data = (__be32 *)(bp->mips_firmware->data + file_offset); + + offset = cpu_reg->spad_base + (addr - cpu_reg->mips_view_base); + if (len) { int j; - for (j = 0; j < (fw->rodata_len / 4); j++, offset += 4) { - bnx2_reg_wr_ind(bp, offset, fw->rodata[j]); - } + for (j = 0; j < (len / 4); j++, offset += 4) + bnx2_reg_wr_ind(bp, offset, be32_to_cpu(data[j])); } /* Clear the pre-fetch instruction. */ bnx2_reg_wr_ind(bp, cpu_reg->inst, 0); - bnx2_reg_wr_ind(bp, cpu_reg->pc, fw->start_addr); + + val = be32_to_cpu(fw_entry->start_addr); + bnx2_reg_wr_ind(bp, cpu_reg->pc, val); /* Start the CPU. */ val = bnx2_reg_rd_ind(bp, cpu_reg->mode); @@ -3515,95 +3622,40 @@ load_cpu_fw(struct bnx2 *bp, const struct cpu_reg *cpu_reg, struct fw_info *fw) static int bnx2_init_cpus(struct bnx2 *bp) { - struct fw_info *fw; - int rc, rv2p_len; - void *text, *rv2p; + const struct bnx2_mips_fw_file *mips_fw = + (const struct bnx2_mips_fw_file *) bp->mips_firmware->data; + const struct bnx2_rv2p_fw_file *rv2p_fw = + (const struct bnx2_rv2p_fw_file *) bp->rv2p_firmware->data; + int rc; /* Initialize the RV2P processor. */ - text = vmalloc(FW_BUF_SIZE); - if (!text) - return -ENOMEM; - if (CHIP_NUM(bp) == CHIP_NUM_5709) { - rv2p = bnx2_xi_rv2p_proc1; - rv2p_len = sizeof(bnx2_xi_rv2p_proc1); - } else { - rv2p = bnx2_rv2p_proc1; - rv2p_len = sizeof(bnx2_rv2p_proc1); - } - rc = zlib_inflate_blob(text, FW_BUF_SIZE, rv2p, rv2p_len); - if (rc < 0) - goto init_cpu_err; - - load_rv2p_fw(bp, text, rc /* == len */, RV2P_PROC1); - - if (CHIP_NUM(bp) == CHIP_NUM_5709) { - rv2p = bnx2_xi_rv2p_proc2; - rv2p_len = sizeof(bnx2_xi_rv2p_proc2); - } else { - rv2p = bnx2_rv2p_proc2; - rv2p_len = sizeof(bnx2_rv2p_proc2); - } - rc = zlib_inflate_blob(text, FW_BUF_SIZE, rv2p, rv2p_len); - if (rc < 0) - goto init_cpu_err; - - load_rv2p_fw(bp, text, rc /* == len */, RV2P_PROC2); + load_rv2p_fw(bp, RV2P_PROC1, &rv2p_fw->proc1); + load_rv2p_fw(bp, RV2P_PROC2, &rv2p_fw->proc2); /* Initialize the RX Processor. */ - if (CHIP_NUM(bp) == CHIP_NUM_5709) - fw = &bnx2_rxp_fw_09; - else - fw = &bnx2_rxp_fw_06; - - fw->text = text; - rc = load_cpu_fw(bp, &cpu_reg_rxp, fw); + rc = load_cpu_fw(bp, &cpu_reg_rxp, &mips_fw->rxp); if (rc) goto init_cpu_err; /* Initialize the TX Processor. */ - if (CHIP_NUM(bp) == CHIP_NUM_5709) - fw = &bnx2_txp_fw_09; - else - fw = &bnx2_txp_fw_06; - - fw->text = text; - rc = load_cpu_fw(bp, &cpu_reg_txp, fw); + rc = load_cpu_fw(bp, &cpu_reg_txp, &mips_fw->txp); if (rc) goto init_cpu_err; /* Initialize the TX Patch-up Processor. */ - if (CHIP_NUM(bp) == CHIP_NUM_5709) - fw = &bnx2_tpat_fw_09; - else - fw = &bnx2_tpat_fw_06; - - fw->text = text; - rc = load_cpu_fw(bp, &cpu_reg_tpat, fw); + rc = load_cpu_fw(bp, &cpu_reg_tpat, &mips_fw->tpat); if (rc) goto init_cpu_err; /* Initialize the Completion Processor. */ - if (CHIP_NUM(bp) == CHIP_NUM_5709) - fw = &bnx2_com_fw_09; - else - fw = &bnx2_com_fw_06; - - fw->text = text; - rc = load_cpu_fw(bp, &cpu_reg_com, fw); + rc = load_cpu_fw(bp, &cpu_reg_com, &mips_fw->com); if (rc) goto init_cpu_err; /* Initialize the Command Processor. */ - if (CHIP_NUM(bp) == CHIP_NUM_5709) - fw = &bnx2_cp_fw_09; - else - fw = &bnx2_cp_fw_06; - - fw->text = text; - rc = load_cpu_fw(bp, &cpu_reg_cp, fw); + rc = load_cpu_fw(bp, &cpu_reg_cp, &mips_fw->cp); init_cpu_err: - vfree(text); return rc; } @@ -7807,6 +7859,10 @@ bnx2_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) pci_set_drvdata(pdev, dev); + rc = bnx2_request_firmware(bp); + if (rc) + goto error; + memcpy(dev->dev_addr, bp->mac_addr, 6); memcpy(dev->perm_addr, bp->mac_addr, 6); @@ -7823,13 +7879,7 @@ bnx2_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) if ((rc = register_netdev(dev))) { dev_err(&pdev->dev, "Cannot register net device\n"); - if (bp->regview) - iounmap(bp->regview); - pci_release_regions(pdev); - pci_disable_device(pdev); - pci_set_drvdata(pdev, NULL); - free_netdev(dev); - return rc; + goto error; } printk(KERN_INFO "%s: %s (%c%d) %s found at mem %lx, " @@ -7843,6 +7893,20 @@ bnx2_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) bp->pdev->irq, dev->dev_addr); return 0; + +error: + if (bp->mips_firmware) + release_firmware(bp->mips_firmware); + if (bp->rv2p_firmware) + release_firmware(bp->rv2p_firmware); + + if (bp->regview) + iounmap(bp->regview); + pci_release_regions(pdev); + pci_disable_device(pdev); + pci_set_drvdata(pdev, NULL); + free_netdev(dev); + return rc; } static void __devexit @@ -7855,6 +7919,11 @@ bnx2_remove_one(struct pci_dev *pdev) unregister_netdev(dev); + if (bp->mips_firmware) + release_firmware(bp->mips_firmware); + if (bp->rv2p_firmware) + release_firmware(bp->rv2p_firmware); + if (bp->regview) iounmap(bp->regview); diff --git a/drivers/net/bnx2.h b/drivers/net/bnx2.h index 704cbbcbf97a..5b570e17c839 100644 --- a/drivers/net/bnx2.h +++ b/drivers/net/bnx2.h @@ -6885,6 +6885,8 @@ struct bnx2 { u32 idle_chk_status_idx; + const struct firmware *mips_firmware; + const struct firmware *rv2p_firmware; }; #define REG_RD(bp, offset) \ @@ -6915,44 +6917,41 @@ struct cpu_reg { u32 mips_view_base; }; -struct fw_info { - const u32 ver_major; - const u32 ver_minor; - const u32 ver_fix; - - const u32 start_addr; - - /* Text section. */ - const u32 text_addr; - const u32 text_len; - const u32 text_index; - __le32 *text; - u8 *gz_text; - const u32 gz_text_len; - - /* Data section. */ - const u32 data_addr; - const u32 data_len; - const u32 data_index; - const u32 *data; - - /* SBSS section. */ - const u32 sbss_addr; - const u32 sbss_len; - const u32 sbss_index; - - /* BSS section. */ - const u32 bss_addr; - const u32 bss_len; - const u32 bss_index; - - /* Read-only section. */ - const u32 rodata_addr; - const u32 rodata_len; - const u32 rodata_index; - const u32 *rodata; +struct bnx2_fw_file_section { + __be32 addr; + __be32 len; + __be32 offset; }; +struct bnx2_mips_fw_file_entry { + __be32 start_addr; + struct bnx2_fw_file_section text; + struct bnx2_fw_file_section data; + struct bnx2_fw_file_section rodata; +}; + +struct bnx2_rv2p_fw_file_entry { + struct bnx2_fw_file_section rv2p; + __be32 fixup[8]; +}; + +struct bnx2_mips_fw_file { + struct bnx2_mips_fw_file_entry com; + struct bnx2_mips_fw_file_entry cp; + struct bnx2_mips_fw_file_entry rxp; + struct bnx2_mips_fw_file_entry tpat; + struct bnx2_mips_fw_file_entry txp; +}; + +struct bnx2_rv2p_fw_file { + struct bnx2_rv2p_fw_file_entry proc1; + struct bnx2_rv2p_fw_file_entry proc2; +}; + +#define RV2P_P1_FIXUP_PAGE_SIZE_IDX 0 +#define RV2P_BD_PAGE_SIZE_MSK 0xffff +#define RV2P_BD_PAGE_SIZE ((BCM_PAGE_SIZE / 16) - 1) + #define RV2P_PROC1 0 #define RV2P_PROC2 1 diff --git a/drivers/net/bnx2_fw.h b/drivers/net/bnx2_fw.h index 6a4f1d695de7..940eb91f209d 100644 --- a/drivers/net/bnx2_fw.h +++ b/drivers/net/bnx2_fw.h @@ -4,883 +4,9 @@ * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, except as noted below. - * - * This file contains firmware data derived from proprietary unpublished - * source code, Copyright (c) 2004, 2005, 2006, 2007 Broadcom Corporation. - * - * Permission is hereby granted for the distribution of this firmware data - * in hexadecimal or equivalent format, provided this copyright notice is - * accompanying it. + * the Free Software Foundation. */ -static u8 bnx2_COM_b06FwText[] = { - 0xcd, 0x7c, 0x0d, 0x70, 0x5c, 0xd7, 0x75, 0xde, 0xd9, 0xb7, 0xbb, 0xc0, - 0x12, 0x04, 0xc1, 0x07, 0x68, 0x05, 0xad, 0x24, 0x24, 0xde, 0x87, 0x7d, - 0x00, 0x56, 0x22, 0xe4, 0x3c, 0x32, 0x10, 0x0d, 0xb9, 0x5b, 0x72, 0xbd, - 0x0b, 0x50, 0x90, 0x43, 0x23, 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const u32 bnx2_COM_b06FwData[(0x0/4) + 1] = { 0x0 }; -static const u32 bnx2_COM_b06FwRodata[(0x14/4) + 1] = { - 0x08000e7c, 0x08000ec4, 0x08000f04, 0x08000f50, 0x08000f84, 0x00000000 -}; - -static struct fw_info bnx2_com_fw_06 = { - /* Firmware version: 4.6.16 */ - .ver_major = 0x4, - .ver_minor = 0x6, - .ver_fix = 0x10, - - .start_addr = 0x080000f8, - - .text_addr = 0x08000000, - .text_len = 0x4da4, - .text_index = 0x0, - .gz_text = bnx2_COM_b06FwText, - .gz_text_len = sizeof(bnx2_COM_b06FwText), - - .data_addr = 0x00000000, - .data_len = 0x0, - .data_index = 0x0, - .data = bnx2_COM_b06FwData, - - .sbss_addr = 0x08004de0, - .sbss_len = 0x38, - .sbss_index = 0x0, - - .bss_addr = 0x08004e18, - .bss_len = 0xbc, - .bss_index = 0x0, - - .rodata_addr = 0x08004da4, - .rodata_len = 0x14, - .rodata_index = 0x0, - .rodata = bnx2_COM_b06FwRodata, -}; - /* Initialized Values for the Completion Processor. */ static const struct cpu_reg cpu_reg_com = { .mode = BNX2_COM_CPU_MODE, @@ -897,1277 +23,6 @@ static const struct cpu_reg cpu_reg_com = { .mips_view_base = 0x8000000, }; -static u8 bnx2_CP_b06FwText[] = { - 0x9d, 0xbc, 0x0d, 0x7c, 0x1b, 0xe5, 0x95, 0x2e, 0xfe, 0xcc, 0x48, 0xb2, - 0x65, 0x5b, 0xb6, 0xc7, 0x8e, 0x92, 0x28, 0xac, 0x37, 0xd1, 0xc4, 0x23, - 0x47, 0xc1, 0xa6, 0x8c, 0x12, 0x27, 0xa8, 0xac, 0x4a, 0x54, 0xc7, 0x24, - 0x4e, 0x48, 0xc1, 0x29, 0x69, 0x6b, 0xb8, 0x2d, 0xa8, 0xf9, 0xc2, 0x84, - 0x40, 0x43, 0xcb, 0xde, 0x6b, 0xee, 0xed, 0xae, 0x55, 0xdb, 0x49, 0x9c, - 0x44, 0x96, 0x6c, 0xc7, 0x24, 0xa1, 0xdb, 0xff, 0xa2, 0xc4, 0xce, 0x07, - 0x54, 0xb6, 0xd2, 0x96, 0xee, 0x86, 0xde, 0x74, 0xd1, 0x4d, 0x02, 0x18, - 0xca, 0x47, 0xda, 0xe5, 0x76, 0x69, 0x7f, 0xbd, 0xc5, 0x97, 0x42, 0x08, - 0x5b, 0x0a, 0xe9, 0xe7, 0x86, 0x7e, 0x30, 0xf7, 0x39, 0x23, 0x29, 0x31, - 0x2c, 0xdb, 0x76, 0xff, 0xfa, 0xfd, 0xe6, 0x27, 0xcd, 0xe8, 0xfd, 0x38, - 0xef, 0x79, 0xcf, 0x79, 0xce, 0x73, 0xde, 0x79, 0x67, 0xfc, 0x40, 0x39, - 0x0a, 0x9f, 0x4a, 0x1e, 0x1f, 0x6a, 0xde, 0xb6, 0x61, 0x69, 0xe8, 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0x5d, - 0xca, 0xd8, 0x74, 0xae, 0xf9, 0x3e, 0x6c, 0x4f, 0x88, 0x9e, 0xe5, 0x1d, - 0x95, 0xc4, 0x60, 0x9b, 0x6b, 0xb9, 0xe8, 0x6f, 0x4b, 0x91, 0xd6, 0xe2, - 0x38, 0xd4, 0x24, 0xcf, 0xe6, 0xb9, 0x68, 0xd3, 0x71, 0x94, 0x91, 0xdb, - 0x46, 0x79, 0x4d, 0xf6, 0xb4, 0x1c, 0x31, 0xf5, 0xe8, 0x13, 0xf8, 0x12, - 0x1c, 0x57, 0xd9, 0xeb, 0x5f, 0x6d, 0x69, 0xc8, 0x75, 0x93, 0xb9, 0xc9, - 0xf4, 0x15, 0x83, 0x32, 0xda, 0x8e, 0xbd, 0x17, 0xdb, 0x94, 0x67, 0xf7, - 0x06, 0x12, 0xf2, 0x0c, 0x59, 0x63, 0x8c, 0xfc, 0x10, 0xcf, 0x65, 0x64, - 0xff, 0xc3, 0x6f, 0xad, 0xf8, 0x4c, 0xd9, 0x67, 0x39, 0xbd, 0x4e, 0x09, - 0x71, 0x29, 0x10, 0xae, 0x52, 0x8a, 0xcf, 0x91, 0x5d, 0xfe, 0xdc, 0x44, - 0x9b, 0x39, 0x6f, 0x3f, 0xfb, 0x27, 0x67, 0x11, 0xb4, 0xa4, 0xe4, 0x5d, - 0x8c, 0xfa, 0xe4, 0x2a, 0x34, 0xe6, 0xea, 0x1d, 0xce, 0x02, 0xff, 0x08, - 0x63, 0x0d, 0xed, 0x66, 0x47, 0x20, 0x6c, 0x3f, 0xe3, 0x26, 0xef, 0xdc, - 0x78, 0x18, 0x7a, 0xe7, 0x1b, 0x2c, 0xff, 0xb1, 0xec, 0xf3, 0x56, 0xda, - 0x2b, 0x63, 0x2a, 0xfa, 0xb8, 0xbc, 0xdb, 0x87, 0x7a, 0x8c, 0x88, 0x7f, - 0x78, 0x50, 0x13, 0x09, 0xd3, 0x0f, 0x25, 0x7e, 0xcb, 0xf3, 0x71, 0xfa, - 0x01, 0xc9, 0xab, 0x5a, 0xb2, 0xf2, 0xfc, 0xb7, 0xec, 0x9b, 0xd6, 0xfd, - 0x6b, 0x1d, 0xc1, 0xc2, 0xfe, 0xe5, 0x62, 0xbc, 0xb7, 0xbc, 0x85, 0xbd, - 0xd5, 0xee, 0x79, 0x8c, 0x6f, 0x96, 0xbd, 0x6f, 0x60, 0xa3, 0x8d, 0x0d, - 0x9a, 0xa1, 0x1f, 0xfb, 0xa5, 0xa3, 0x1b, 0x8f, 0x2d, 0x32, 0xba, 0x8e, - 0xab, 0xb9, 0xb4, 0x8f, 0x38, 0x71, 0xad, 0x23, 0x3a, 0xc4, 0x6f, 0xff, - 0x77, 0x89, 0xcd, 0x37, 0xd9, 0x75, 0xf5, 0xe0, 0x3a, 0xb5, 0xf8, 0x6c, - 0xb5, 0x3c, 0x73, 0xa1, 0x77, 0x7c, 0x43, 0xe9, 0xc6, 0xd6, 0x90, 0xd1, - 0xbe, 0x4d, 0xd1, 0xdb, 0xbe, 0xac, 0xe8, 0xfe, 0x90, 0x22, 0xe5, 0xec, - 0x77, 0xe8, 0x5c, 0x8a, 0x9d, 0x2e, 0xf6, 0x71, 0x38, 0xa1, 0x87, 0x67, - 0xb0, 0xec, 0x39, 0xd3, 0xf0, 0x5d, 0x60, 0x9b, 0x3f, 0xe4, 0x31, 0x84, - 0x20, 0x96, 0xdb, 0xed, 0x46, 0x17, 0xba, 0xec, 0xf7, 0xa4, 0x76, 0x30, - 0x26, 0xc8, 0xfb, 0xb0, 0x62, 0xd0, 0x92, 0x75, 0x34, 0x31, 0xbd, 0xff, - 0x66, 0x48, 0x4e, 0xdd, 0xc3, 0x80, 0xed, 0x81, 0x37, 0xd2, 0x8d, 0x86, - 0x45, 0x86, 0x6f, 0x89, 0x6a, 0xd7, 0x0f, 0xca, 0xfb, 0x81, 0x96, 0x73, - 0x9c, 0x23, 0x90, 0x36, 0x72, 0x96, 0xd6, 0x50, 0x6d, 0xd7, 0x59, 0xa4, - 0x7e, 0x14, 0xae, 0x0f, 0xfd, 0xca, 0x4a, 0x6b, 0xd0, 0x6a, 0x0d, 0xa9, - 0x13, 0x1f, 0xd2, 0xf0, 0x1f, 0xd5, 0x13, 0x5c, 0xf9, 0xa5, 0x85, 0x59, - 0x52, 0x4f, 0xf6, 0xac, 0x7d, 0x1a, 0x77, 0x0d, 0xc8, 0x7b, 0x22, 0xc4, - 0x1f, 0xf5, 0xe8, 0x17, 0xc8, 0x35, 0xcb, 0xed, 0xf7, 0x6f, 0x49, 0x2c, - 0x59, 0x4f, 0x3c, 0xeb, 0x86, 0x16, 0xd2, 0xfb, 0xaf, 0x50, 0xe5, 0x1d, - 0x43, 0x8f, 0xc9, 0xbe, 0x9d, 0x03, 0x0b, 0xd4, 0xfc, 0xfe, 0x9e, 0xd8, - 0x1f, 0x7d, 0x5f, 0x11, 0xfb, 0x2a, 0x97, 0xf7, 0x15, 0xd5, 0xd9, 0xcf, - 0xa7, 0xac, 0x4f, 0x38, 0x0a, 0xfb, 0x15, 0x2f, 0xbf, 0xc7, 0x73, 0x23, - 0x79, 0xfd, 0x26, 0x79, 0x67, 0x1f, 0xc7, 0xba, 0x39, 0x21, 0x4b, 0x5a, - 0xff, 0x0f, 0xdd, 0x0f, 0x6b, 0xf2, 0xd0, 0x56, 0x00, 0x00, 0x00 }; - -static const u32 bnx2_CP_b06FwData[(0x84/4) + 1] = { - 0x00000000, 0x0000001b, 0x0000000f, 0x0000000a, 0x00000008, 0x00000006, - 0x00000005, 0x00000005, 0x00000004, 0x00000004, 0x00000003, 0x00000003, - 0x00000003, 0x00000003, 0x00000003, 0x00000002, 0x00000002, 0x00000002, - 0x00000002, 0x00000002, 0x00000002, 0x00000002, 0x00000002, 0x00000002, - 0x00000002, 0x00000002, 0x00000002, 0x00000002, 0x00000002, 0x00000002, - 0x00000001, 0x00000001, 0x00000001, 0x00000000 }; -static const u32 bnx2_CP_b06FwRodata[(0x134/4) + 1] = { - 0x08000f30, 0x08000d88, 0x08000fc4, 0x0800106c, 0x08000f58, 0x08000f98, - 0x080011a4, 0x08000da4, 0x080011c8, 0x08000df4, 0x08001498, 0x08001440, - 0x08000da4, 0x08000da4, 0x08000da4, 0x08001254, 0x08001254, 0x08000da4, - 0x08000da4, 0x080016e0, 0x08000da4, 0x08000da4, 0x08000da4, 0x08000da4, - 0x080013d4, 0x08000da4, 0x08000da4, 0x08000da4, 0x08000da4, 0x08000da4, - 0x08000da4, 0x08000da4, 0x08000da4, 0x08000da4, 0x08000da4, 0x08000da4, - 0x08000da4, 0x08000da4, 0x08000da4, 0x08000fb8, 0x08000da4, 0x08000da4, - 0x08001690, 0x08000da4, 0x08000da4, 0x08000da4, 0x08000da4, 0x08000da4, - 0x08000da4, 0x08000da4, 0x08000da4, 0x08000da4, 0x08000da4, 0x08000da4, - 0x08000da4, 0x08000da4, 0x08000da4, 0x08000da4, 0x08000da4, 0x08000da4, - 0x080015bc, 0x08000da4, 0x08000da4, 0x08001348, 0x080012b8, 0x08002e50, - 0x08002e58, 0x08002e20, 0x08002e2c, 0x08002e38, 0x08002e44, 0x0800532c, - 0x080052ec, 0x080052b8, 0x0800528c, 0x08005268, 0x08005224, 0x00000000 -}; - -static struct fw_info bnx2_cp_fw_06 = { - /* Firmware version: 4.6.16 */ - .ver_major = 0x4, - .ver_minor = 0x6, - .ver_fix = 0x10, - - .start_addr = 0x08000080, - - .text_addr = 0x08000000, - .text_len = 0x56cc, - .text_index = 0x0, - .gz_text = bnx2_CP_b06FwText, - .gz_text_len = sizeof(bnx2_CP_b06FwText), - - .data_addr = 0x08005820, - .data_len = 0x84, - .data_index = 0x0, - .data = bnx2_CP_b06FwData, - - .sbss_addr = 0x080058a4, - .sbss_len = 0xf1, - .sbss_index = 0x0, - - .bss_addr = 0x08005998, - .bss_len = 0x5d8, - .bss_index = 0x0, - - .rodata_addr = 0x080056cc, - .rodata_len = 0x134, - .rodata_index = 0x0, - .rodata = bnx2_CP_b06FwRodata, -}; - /* Initialized Values the Command Processor. */ static const struct cpu_reg cpu_reg_cp = { .mode = BNX2_CP_CPU_MODE, @@ -2184,771 +39,6 @@ static const struct cpu_reg cpu_reg_cp = { .mips_view_base = 0x8000000, }; -static u8 bnx2_RXP_b06FwText[] = { - 0xec, 0x5b, 0x5d, 0x6c, 0x1c, 0xd7, 0x75, 0x3e, 0x33, 0x3b, 0x24, 0x57, - 0x14, 0x45, 0x8e, 0xa8, 0x15, 0xb5, 0xb2, 0x99, 0x64, 0x97, 0x1c, 0x89, - 0x1b, 0x93, 0x50, 0x86, 0xec, 0x5a, 0x66, 0x92, 0x45, 0xbc, 0x59, 0x52, - 0x16, 0x53, 0x08, 0xf0, 0xda, 0x56, 0x5c, 0xa3, 0x31, 0x90, 0xc5, 0x92, - 0x76, 0xd2, 0x37, 0xc9, 0xa9, 0x5d, 0x21, 0xb1, 0xab, 0xf5, 0x92, 0x91, - 0x15, 0x75, 0xc5, 0x61, 0x24, 0x26, 0x72, 0x1b, 0xb7, 0xa0, 0xf9, 0x23, - 0xaa, 0xc1, 0x4a, 0xe3, 0x9f, 0xd8, 0xf5, 0x43, 0x64, 0x31, 0xb2, 0xad, - 0xfa, 0xa5, 0x80, 0xd3, 0x1f, 0xc0, 0x28, 0x8c, 0x56, 0x90, 0x6b, 0xd9, - 0x68, 0x81, 0x42, 0x6d, 0x51, 0xd4, 0x6d, 0x64, 0x4d, 0xbf, 0xef, 0xce, - 0x0c, 0xb9, 0x22, 0x94, 0xc6, 0x2f, 0x7d, 0x9b, 0x0b, 0x2c, 0xee, 0xdc, - 0x3b, 0xe7, 0x9e, 0x7b, 0xce, 0xb9, 0xe7, 0xf7, 0x0e, 0xf9, 0x44, 0x9b, - 0xb4, 0x4a, 0xd0, 0x36, 0xe1, 0x97, 0x3d, 0x70, 0xe8, 0xb1, 0xc1, 0x5d, - 0xbb, 0x77, 0xe1, 0x71, 0x77, 0xcc, 0x6c, 0x36, 0x38, 0xaf, 0x49, 0xd4, - 0xa2, 0x16, 0xb5, 0xa8, 0x45, 0x2d, 0x6a, 0x51, 0x8b, 0x5a, 0xd4, 0xa2, - 0x16, 0xb5, 0xa8, 0x45, 0x2d, 0x6a, 0x51, 0x8b, 0x5a, 0xd4, 0xa2, 0x16, - 0xb5, 0xa8, 0x45, 0x2d, 0x6a, 0x51, 0x8b, 0x5a, 0xd4, 0xa2, 0x16, 0xb5, - 0xa8, 0x45, 0x2d, 0x6a, 0x51, 0x8b, 0x5a, 0xd4, 0xa2, 0x16, 0xb5, 0xa8, - 0x45, 0x2d, 0x6a, 0x51, 0x8b, 0x5a, 0xd4, 0xa2, 0x16, 0xb5, 0xa8, 0x45, - 0x2d, 0x6a, 0x51, 0x8b, 0x5a, 0xd4, 0xfe, 0x3f, 0x5a, 0x4c, 0xc4, 0x64, - 0xbf, 0x29, 0xf8, 0x49, 0x5c, 0xcf, 0xa5, 0x0e, 0x16, 0x2c, 0x89, 0xc7, - 0x72, 0x6f, 0x3f, 0x3e, 0x6e, 0x89, 0xe4, 0xeb, 0xfd, 0xa9, 0x11, 0xf9, - 0xc4, 0xab, 0x24, 0x0c, 0xe1, 0xfc, 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0x12, 0xd7, 0x68, 0x9f, 0xd4, 0xa6, 0xc5, 0x8b, 0x98, 0x67, 0x6e, 0x4b, - 0xf3, 0x0f, 0xb1, 0xd3, 0xe1, 0x44, 0x65, 0x46, 0xb1, 0x0e, 0x7c, 0x55, - 0xe7, 0x0e, 0x7b, 0x1c, 0x6a, 0xcc, 0x2d, 0xd1, 0xbf, 0x64, 0x1e, 0xa6, - 0x43, 0xb2, 0x15, 0x91, 0x57, 0xa0, 0xdf, 0x57, 0xd7, 0xb9, 0xe7, 0xc2, - 0xbd, 0xc6, 0x47, 0xac, 0xdf, 0x63, 0x49, 0xaf, 0xe6, 0x6b, 0x8b, 0x58, - 0x2f, 0xf0, 0xab, 0xf1, 0xf0, 0x29, 0xf8, 0x09, 0x5a, 0x27, 0xc1, 0x18, - 0xeb, 0x2c, 0x7c, 0xca, 0xc6, 0xb8, 0x10, 0x30, 0x62, 0x9a, 0xe7, 0x67, - 0xc0, 0x8b, 0x77, 0x73, 0x35, 0xc5, 0xea, 0x82, 0xc6, 0x63, 0x6b, 0xeb, - 0x1d, 0x6a, 0x2f, 0x6a, 0xd5, 0x3e, 0xac, 0x8b, 0x1c, 0xb7, 0xc6, 0x8a, - 0xfe, 0xf9, 0x16, 0xa9, 0x56, 0xd9, 0x96, 0x81, 0x56, 0xd5, 0x97, 0x20, - 0x1f, 0x65, 0xcb, 0x1a, 0xb8, 0x6e, 0x75, 0xc3, 0xc1, 0x2f, 0x85, 0xdf, - 0x08, 0x7e, 0x0f, 0x4a, 0xb6, 0x4c, 0xfe, 0xcd, 0xfc, 0x53, 0x47, 0xd3, - 0xf3, 0x5b, 0xf4, 0xfb, 0x11, 0xd6, 0xb4, 0x15, 0x7d, 0x3f, 0xad, 0x58, - 0xdd, 0x8f, 0x9b, 0x32, 0xbe, 0x9b, 0xf2, 0xb1, 0xee, 0xa7, 0x7e, 0x6d, - 0xed, 0xbf, 0x01, 0x17, 0x24, 0x5e, 0x9d, 0xe0, 0x70, 0x00, 0x00, 0x00 }; - -static const u32 bnx2_RXP_b06FwData[(0x0/4) + 1] = { 0x0 }; -static const u32 bnx2_RXP_b06FwRodata[(0x24/4) + 1] = { - 0x08004c28, 0x08004c28, 0x08004ba0, 0x08004bd8, 0x08004c0c, 0x08004c30, - 0x08004c30, 0x08004c30, 0x08004b10, 0x00000000 }; - -static struct fw_info bnx2_rxp_fw_06 = { - /* Firmware version: 4.6.16 */ - .ver_major = 0x4, - .ver_minor = 0x6, - .ver_fix = 0x10, - - .start_addr = 0x080031d8, - - .text_addr = 0x08000000, - .text_len = 0x70dc, - .text_index = 0x0, - .gz_text = bnx2_RXP_b06FwText, - .gz_text_len = sizeof(bnx2_RXP_b06FwText), - - .data_addr = 0x00000000, - .data_len = 0x0, - .data_index = 0x0, - .data = bnx2_RXP_b06FwData, - - .sbss_addr = 0x08007120, - .sbss_len = 0x54, - .sbss_index = 0x0, - - .bss_addr = 0x08007178, - .bss_len = 0x450, - .bss_index = 0x0, - - .rodata_addr = 0x080070dc, - .rodata_len = 0x24, - .rodata_index = 0x0, - .rodata = bnx2_RXP_b06FwRodata, -}; - /* Initialized Values for the RX Processor. */ static const struct cpu_reg cpu_reg_rxp = { .mode = BNX2_RXP_CPU_MODE, @@ -2965,595 +55,6 @@ static const struct cpu_reg cpu_reg_rxp = { .mips_view_base = 0x8000000, }; -static u8 bnx2_rv2p_proc1[] = { - /* Date: 02/03/2009 14:20 */ - 0xa5, 0x56, 0x4f, 0x68, 0x14, 0x67, 0x14, 0x7f, 0x33, 0xbb, 0xb3, 0xb3, - 0x99, 0x9d, 0xd9, 0xdd, 0x92, 0x18, 0x96, 0x18, 0xcc, 0x1a, 0x84, 0x92, - 0x75, 0xb7, 0x6e, 0x6c, 0x0f, 0x42, 0x03, 0x29, 0xb9, 0x08, 0x35, 0x87, - 0x12, 0x11, 0x8a, 0x2d, 0x68, 0xb7, 0x22, 0x14, 0x0a, 0xa5, 0x07, 0x8f, - 0xa5, 0x83, 0x71, 0x53, 0x5a, 0xbc, 0xe4, 0xd0, 0x80, 0x42, 0x35, 0x27, - 0x5b, 0x62, 0x0e, 0x3b, 0xe0, 0xa1, 0x88, 0xe0, 0x41, 0x8f, 0x7a, 0xaa, - 0x7f, 0x5a, 0x28, 0x46, 0x29, 0xb5, 0x87, 0x82, 0xc7, 0xde, 0x9a, 0xe9, - 0xf7, 0xfe, 0x7c, 0xbb, 0x33, 0x5f, 0x66, 0x13, 0xa1, 0x42, 0xfc, 0xf1, - 0xbd, 0x79, 0xef, 0xfb, 0xde, 0x9f, 0xdf, 0x7b, 0x6f, 0xab, 0x00, 0x60, - 0x43, 0x18, 0x4d, 0x29, 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0xb6, 0x34, 0x9b, 0xb9, 0xa0, 0x0c, 0x00, 0x00, - 0x00 }; - -static u8 bnx2_rv2p_proc2[] = { - /* Date: 02/03/2009 14:20 */ - 0xad, 0x57, 0x4d, 0x68, 0x5c, 0x55, 0x14, 0x3e, 0xf3, 0xe6, 0xef, 0xcd, - 0xcc, 0x9b, 0xcc, 0x34, 0x8d, 0x93, 0x31, 0x29, 0x26, 0x4d, 0x68, 0xea, - 0xc8, 0x44, 0xf3, 0x47, 0x05, 0x5d, 0x18, 0x46, 0x48, 0x7f, 0x2c, 0x34, - 0x8d, 0x2e, 0x8a, 0x9b, 0x36, 0x53, 0x3b, 0x3a, 0x6d, 0xed, 0xc2, 0xec, - 0xdc, 0xf8, 0xb0, 0x35, 0x41, 0x98, 0x45, 0x53, 0x4c, 0x13, 0x44, 0xa8, - 0xe8, 0xce, 0xdd, 0x88, 0x9a, 0xd6, 0x8d, 0x50, 0x68, 0x28, 0x76, 0x51, - 0x04, 0x05, 0xed, 0x42, 0x10, 0xad, 0xa1, 0x15, 0x41, 0x51, 0xb3, 0x92, - 0x8c, 0xf7, 0x9e, 0xef, 0xdc, 0x37, 0xef, 0x4d, 0xa6, 0xa4, 0x0b, 0x67, - 0xf3, 0xe5, 0xdc, 0x77, 0xee, 0xb9, 0xe7, 0xe7, 0x3b, 0xe7, 0xde, 0x64, - 0x89, 0x28, 0x42, 0x6e, 0xbd, 0x4f, 0x21, 0x85, 0xc2, 0x21, 0x5b, 0x41, - 0x83, 0x28, 0x9a, 0xd7, 0x32, 0x59, 0x24, 0xbf, 0x27, 0xb2, 0x0c, 0xdf, - 0xd6, 0x1d, 0xad, 0x46, 0x6e, 0x41, 0xeb, 0xd9, 0xf4, 0x92, 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0x32, 0x9f, 0x8f, 0x94, 0x92, 0x83, 0xa7, - 0x99, 0xb7, 0xc7, 0xf9, 0x7c, 0x94, 0xf7, 0xdc, 0x4a, 0x7d, 0x77, 0xef, - 0x78, 0x3d, 0xbe, 0x3d, 0x1e, 0xc3, 0xd6, 0xf1, 0x80, 0x9a, 0x02, 0xb7, - 0x35, 0x72, 0xdf, 0x57, 0x89, 0xe7, 0xcd, 0x4b, 0xaf, 0xc3, 0x5a, 0x27, - 0xe9, 0xde, 0xcd, 0xdc, 0xab, 0x3b, 0x08, 0xc7, 0x21, 0x8e, 0xfe, 0xd9, - 0x5b, 0x2e, 0xd0, 0x44, 0xbd, 0xbf, 0xd4, 0x12, 0xeb, 0xc7, 0x57, 0x57, - 0x9e, 0x47, 0xd2, 0x79, 0x6a, 0x0b, 0x62, 0xb2, 0x44, 0x4c, 0x32, 0x36, - 0x4f, 0x97, 0x88, 0x4b, 0x6a, 0xc3, 0x93, 0x25, 0x8d, 0x6d, 0x1f, 0xcf, - 0x75, 0x0c, 0xa9, 0x2a, 0x56, 0x3e, 0x55, 0x4f, 0x78, 0xaf, 0x45, 0x50, - 0x6f, 0xe9, 0xdf, 0x76, 0xf0, 0x66, 0x31, 0xe1, 0x6c, 0x28, 0x6b, 0x3c, - 0xfc, 0x6d, 0x0d, 0x0f, 0x6f, 0x47, 0xaa, 0xfa, 0x44, 0xce, 0x4c, 0x42, - 0x73, 0xdd, 0x62, 0xe7, 0xa6, 0xd2, 0xf0, 0x34, 0x7d, 0x9f, 0xa7, 0xc6, - 0x76, 0xdf, 0x67, 0xc8, 0xc7, 0xa6, 0x8c, 0x2e, 0xf6, 0xd4, 0xf4, 0x87, - 0xbe, 0x33, 0xf3, 0x37, 0x2d, 0x3b, 0x75, 0x4c, 0x8e, 0x17, 0x71, 0x2b, - 0xfb, 0x1e, 0x3f, 0x44, 0xf5, 0x6e, 0x53, 0xbc, 0xf3, 0x43, 0xbc, 0xf3, - 0x0f, 0xf9, 0x3c, 0x51, 0x4a, 0x66, 0x7b, 0x78, 0xe7, 0x27, 0xf9, 0x3c, - 0x59, 0x6a, 0xad, 0xd3, 0x67, 0x4c, 0x4e, 0x85, 0xac, 0x03, 0x2f, 0xab, - 0x52, 0xbc, 0x12, 0x0e, 0xf6, 0xc0, 0x06, 0x1a, 0x0e, 0xce, 0xf1, 0xb3, - 0xfe, 0x6d, 0x49, 0xd7, 0x38, 0xcd, 0xf9, 0x83, 0xba, 0x26, 0x67, 0xae, - 0x14, 0x97, 0xd4, 0x47, 0x9e, 0x0c, 0x9f, 0xc6, 0x29, 0x35, 0x1f, 0xa9, - 0x99, 0xf9, 0x42, 0x4e, 0xaf, 0x30, 0xa4, 0xbb, 0xc8, 0xac, 0x72, 0x75, - 0x67, 0x8d, 0xab, 0xbd, 0xa9, 0x1b, 0xeb, 0xaa, 0x77, 0x48, 0x39, 0x47, - 0x30, 0x8f, 0xd8, 0xd7, 0x35, 0x55, 0xf3, 0x8f, 0xfe, 0x4c, 0x7d, 0x67, - 0x85, 0x09, 0x93, 0x7e, 0x08, 0x6f, 0xd5, 0x63, 0xd1, 0xda, 0x6f, 0x3e, - 0x29, 0x5f, 0xf7, 0x82, 0xd3, 0xf1, 0x1e, 0x7e, 0xa7, 0x7b, 0xc1, 0x4f, - 0x54, 0x2e, 0xde, 0xf3, 0x19, 0x67, 0x15, 0xd0, 0x45, 0xed, 0xf1, 0x3e, - 0x39, 0xa1, 0x83, 0x2a, 0x4a, 0xe0, 0x14, 0xfb, 0xb0, 0x23, 0x5d, 0x49, - 0x67, 0x17, 0xf7, 0x0b, 0x1d, 0x87, 0x5c, 0xb0, 0x93, 0x3a, 0x93, 0x73, - 0xca, 0x1d, 0x5c, 0xa3, 0xb9, 0xf0, 0x3e, 0xfa, 0xe6, 0xb7, 0xed, 0x96, - 0xe7, 0x63, 0x57, 0xe9, 0x39, 0xc3, 0xf2, 0xb4, 0x5f, 0x52, 0x99, 0x5d, - 0xb4, 0xe7, 0x2c, 0xed, 0x89, 0x78, 0x21, 0xb9, 0x31, 0x55, 0x59, 0x5f, - 0xb0, 0xb4, 0x1d, 0x15, 0x7b, 0x38, 0xa6, 0x39, 0x4f, 0xf6, 0x9f, 0x62, - 0x8d, 0xdd, 0x02, 0xfd, 0x3b, 0x85, 0xb6, 0xa1, 0x2d, 0xb1, 0x85, 0xf6, - 0x1c, 0x8e, 0x57, 0xf8, 0x94, 0xdf, 0xf1, 0xbc, 0x92, 0xb1, 0xbe, 0x9e, - 0x78, 0xbf, 0x22, 0x9d, 0x60, 0x6c, 0xbb, 0xa8, 0xef, 0xab, 0x71, 0xde, - 0x57, 0xc1, 0xf2, 0xff, 0x00, 0xb0, 0x60, 0x72, 0xf9, 0x60, 0x17, 0x00, - 0x00, 0x00 }; - -static const u32 bnx2_TPAT_b06FwData[(0x0/4) + 1] = { 0x0 }; -static const u32 bnx2_TPAT_b06FwRodata[(0x0/4) + 1] = { 0x0 }; - -static struct fw_info bnx2_tpat_fw_06 = { - /* Firmware version: 4.6.16 */ - .ver_major = 0x4, - .ver_minor = 0x6, - .ver_fix = 0x10, - - .start_addr = 0x08000488, - - .text_addr = 0x08000400, - .text_len = 0x175c, - .text_index = 0x0, - .gz_text = bnx2_TPAT_b06FwText, - .gz_text_len = sizeof(bnx2_TPAT_b06FwText), - - .data_addr = 0x00000000, - .data_len = 0x0, - .data_index = 0x0, - .data = bnx2_TPAT_b06FwData, - - .sbss_addr = 0x08001b80, - .sbss_len = 0x44, - .sbss_index = 0x0, - - .bss_addr = 0x08001bc4, - .bss_len = 0x450, - .bss_index = 0x0, - - .rodata_addr = 0x00000000, - .rodata_len = 0x0, - .rodata_index = 0x0, - .rodata = bnx2_TPAT_b06FwRodata, -}; - /* Initialized Values for the TX Patch-up Processor. */ static const struct cpu_reg cpu_reg_tpat = { .mode = BNX2_TPAT_CPU_MODE, @@ -3570,882 +71,6 @@ static const struct cpu_reg cpu_reg_tpat = { .mips_view_base = 0x8000000, }; -static u8 bnx2_TXP_b06FwText[] = { - 0xad, 0x7b, 0x0f, 0x70, 0x54, 0xe7, 0x75, 0xef, 0xef, 0xee, 0x1f, 0x69, - 0x57, 0x5a, 0xad, 0x2e, 0x78, 0xc1, 0xab, 0x54, 0x29, 0x7b, 0xd9, 0xbb, - 0xd2, 0x1a, 0x09, 0xb8, 0x0b, 0xc2, 0x88, 0xe8, 0xd6, 0x6c, 0x85, 0x00, - 0x21, 0x64, 0x2c, 0x63, 0x25, 0x15, 0x7d, 0x9e, 0x5a, 0x0f, 0x64, 0x23, - 0xdb, 0xd8, 0x16, 0x35, 0x6d, 0xe5, 0xd4, 0xad, 0xd6, 0x92, 0xc0, 0xc2, - 0xac, 0xb8, 0x22, 0x0b, 0x11, 0xee, 0xf4, 0xbd, 0xc8, 0x96, 0xb0, 0xb0, - 0xb3, 0x62, 0xed, 0xa4, 0xaf, 0xd3, 0xcc, 0x34, 0xe3, 0x7d, 0xfe, 0x83, - 0x49, 0x1e, 0xb6, 0xd3, 0x4e, 0xe7, 0x3d, 0xa7, 0xf3, 0xde, 0x84, 0x17, - 0x63, 0x62, 0xa7, 0x89, 0xed, 0xe6, 0xa5, 0xf3, 0x44, 0xea, 0xf8, 0xbe, - 0xdf, 0xb9, 0x77, 0x17, 0x88, 0x9b, 0x4e, 0x67, 0x3a, 0x4f, 0x33, 0x9a, - 0xd5, 0xde, 0x3f, 0xdf, 0x77, 0xce, 0xf9, 0xce, 0xf9, 0x9d, 0xdf, 0x39, - 0xdf, 0xa7, 0x06, 0xa0, 0x0a, 0xa5, 0x9f, 0x1a, 0xfe, 0xb6, 0x0c, 0x0d, - 0x1f, 0x4a, 0xad, 0xb9, 0x75, 0x0d, 0xff, 0xbc, 0x15, 0x6a, 0x85, 0x4f, - 0x6e, 0xde, 0xaa, 0x00, 0xfd, 0x3f, 0xc6, 0xbf, 0xeb, 0xe7, 0xf3, 0xff, - 0xbe, 0xd7, 0x9c, 0x1f, 0x2f, 0xa0, 0x96, 0xe5, 0x92, 0x5f, 0x04, 0x3c, - 0xe6, 0xcc, 0x17, 0xda, 0x75, 0x04, 0xbc, 0x66, 0xaf, 0xb9, 0x4f, 0x07, - 0xd2, 0xf9, 0xa6, 0xd8, 0x16, 0xfc, 0xd2, 0xce, 0x44, 0x7c, 0x90, 0xeb, - 0x9f, 0x37, 0x3f, 0x19, 0xf9, 0xf6, 0x46, 0xed, 0xe3, 0x19, 0x2f, 0x02, - 0xaa, 0x79, 0x1a, 0x6a, 0x03, 0x02, 0xf5, 0x7c, 0xe7, 0xcf, 0x1b, 0xfd, - 0x5e, 0x84, 0xcb, 0x63, 0xb5, 0x62, 0xcc, 0x42, 0x26, 0x60, 0x0e, 0xa1, - 0x72, 0x03, 0xf0, 0x5e, 0x36, 0x61, 0x8c, 0x01, 0x53, 0x1e, 0x33, 0x11, - 0x7b, 0x05, 0x06, 0x0e, 0x17, 0x62, 0xe8, 0xe0, 0xef, 0x0e, 0xeb, 0x53, - 0x3b, 0xe6, 0x47, 0xc6, 0xcb, 0xe7, 0xf6, 0xb6, 0x00, 0x5b, 0xb3, 0x06, - 0x8e, 0x58, 0x08, 0xd4, 0x99, 0x8f, 0x63, 0x13, 0x3f, 0xc3, 0xe6, 0x30, - 0xde, 0x9a, 0x8c, 0xc7, 0x9e, 0x83, 0xd6, 0xa7, 0x7b, 0xb5, 0x61, 0xa0, - 0x69, 0x70, 0x40, 0xd1, 0xfa, 0xdf, 0x56, 0xb4, 0x9e, 0x49, 0x05, 0x01, - 0x85, 0xcf, 0x35, 0xe5, 0xe5, 0x73, 0x18, 0xab, 0xf2, 0x01, 0x5c, 0xf2, - 0xca, 0xfc, 0xbf, 0x45, 0x7b, 0x2b, 0xf0, 0xe9, 0xad, 0x18, 0xa7, 0x0c, - 0x7e, 0x53, 0xc1, 0xb3, 0x2d, 0x89, 0xe8, 0x28, 0xe4, 0x7e, 0x0c, 0x5b, - 0x0a, 0xf2, 0xa9, 0x51, 0x6b, 0xdb, 0x1e, 0x37, 0x6c, 0xfb, 0x8c, 0x51, - 0x89, 0x8c, 0xaa, 0x45, 0x01, 0x05, 0xa3, 0x86, 0x07, 0x69, 0xb5, 0x3d, - 0xe6, 0x83, 0x16, 0xbd, 0x17, 0xff, 0x4c, 0x9d, 0xd3, 0x49, 0x3f, 0xdc, - 0xe7, 0xfb, 0x51, 0x89, 0xa2, 0xea, 0x5a, 0xed, 0xd9, 0xac, 0x6d, 0x9f, - 0xd7, 0x7d, 0x38, 0x43, 0xfb, 0x8c, 0xe6, 0xff, 0xd9, 0x2e, 0xd2, 0x36, - 0xe3, 0x7a, 0x79, 0xfe, 0x00, 0x66, 0x54, 0xdb, 0x9e, 0xe5, 0xbd, 0x23, - 0xf9, 0xb2, 0x9d, 0x6d, 0xdb, 0xa3, 0xdb, 0xf6, 0x3e, 0xfd, 0x17, 0xf6, - 0xde, 0x5f, 0x79, 0xd6, 0xb6, 0x9f, 0x32, 0x6e, 0xc2, 0xd9, 0x5c, 0x87, - 0xd2, 0x35, 0xbf, 0x3c, 0xbc, 0x63, 0xda, 0xc6, 0x79, 0x03, 0xaa, 0xc7, - 0xdc, 0xa6, 0xec, 0x98, 0xef, 0x54, 0xb6, 0x16, 0x76, 0x2b, 0xdb, 0x66, - 0x7f, 0x57, 0xe9, 0x9c, 0xef, 0x57, 0xb6, 0x17, 0xa2, 0x98, 0xb3, 0x22, - 0x98, 0xb5, 0xfa, 0x94, 0x8e, 0xf9, 0x5e, 0xc5, 0xd5, 0x63, 0x58, 0x69, - 0x2f, 0x94, 0xc7, 0xba, 0x6e, 0xc7, 0x1d, 0x59, 0x13, 0x13, 0x56, 0x25, - 0xe7, 0x59, 0xb4, 0xbf, 0xdd, 0xb8, 0x48, 0x3d, 0x0d, 0x1c, 0x2d, 0x3c, - 0x85, 0xdb, 0xa7, 0x6d, 0x3b, 0x9f, 0x02, 0xf2, 0x05, 0xe0, 0xeb, 0x56, - 0xbc, 0x67, 0x50, 0xb1, 0xed, 0xed, 0x09, 0x7b, 0xc5, 0x15, 0xa3, 0x29, - 0xf9, 0x1a, 0xfe, 0xaf, 0x3d, 0x13, 0x41, 0x26, 0xc4, 0x31, 0x8e, 0x71, - 0xcd, 0x1e, 0x98, 0x44, 0xa0, 0xd2, 0x1c, 0xc7, 0x8f, 0xb2, 0x08, 0x54, - 0x98, 0x19, 0x9c, 0xcf, 0x8e, 0xaa, 0x01, 0xc4, 0xa3, 0x3b, 0x94, 0xcc, - 0xb0, 0x07, 0xda, 0xd0, 0xbb, 0xd0, 0x62, 0x5c, 0x8f, 0x0b, 0xaf, 0x2a, - 0x5a, 0xf1, 0x35, 0x68, 0xe9, 0x5f, 0x28, 0x5a, 0x67, 0x9d, 0x17, 0x69, - 0x4f, 0x22, 0x80, 0x6f, 0x37, 0xca, 0x9a, 0x8c, 0x63, 0x8d, 0xb3, 0x36, - 0x19, 0xdc, 0x72, 0x6d, 0x6d, 0x4c, 0x8c, 0x52, 0xae, 0x23, 0x94, 0xeb, - 0x75, 0x43, 0x8b, 0x3e, 0x0b, 0x7b, 0xc5, 0x80, 0x21, 0xf7, 0x4c, 0x8c, - 0x17, 0xec, 0x58, 0xd8, 0xbc, 0x44, 0x79, 0x91, 0xf9, 0x9c, 0x19, 0xc8, - 0xd4, 0x9a, 0xbf, 0xb4, 0xdf, 0xdc, 0x10, 0xc5, 0xcb, 0x85, 0x08, 0x5e, - 0x2a, 0xa8, 0x78, 0xb1, 0xd0, 0x01, 0xab, 0x80, 0xf0, 0xed, 0x85, 0x5f, - 0xe7, 0xc7, 0x36, 0x42, 0x7c, 0x9e, 0x72, 0x87, 0x77, 0x16, 0x7c, 0xfd, - 0x15, 0x26, 0x7a, 0xbe, 0x93, 0x1d, 0xb1, 0xab, 0x74, 0xf4, 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0x0b, 0xf9, 0xd7, 0xf0, 0xc6, 0xb5, 0xff, 0x67, - 0x13, 0x7f, 0xb9, 0xb8, 0xb1, 0xcb, 0x39, 0xd3, 0x74, 0xba, 0xf5, 0x96, - 0x84, 0xe0, 0x50, 0x77, 0xb3, 0x9c, 0x71, 0xaa, 0x34, 0xf3, 0x9b, 0x64, - 0xbf, 0xab, 0xc2, 0x34, 0x6f, 0x3d, 0xaf, 0x8b, 0x6d, 0xfe, 0x62, 0xfd, - 0x19, 0x5d, 0xf4, 0xfa, 0x9f, 0x6b, 0xc7, 0x9d, 0xff, 0xaf, 0xfc, 0xbb, - 0x5b, 0xf7, 0xe9, 0x12, 0x3b, 0x67, 0x5b, 0xda, 0x1d, 0x4c, 0x68, 0x35, - 0x57, 0x39, 0x36, 0x68, 0x31, 0x6f, 0x71, 0x3e, 0x0d, 0x33, 0xe9, 0x7c, - 0x9a, 0xa6, 0x6b, 0x9b, 0x6e, 0xb3, 0xc1, 0xf9, 0xec, 0x30, 0xdd, 0xf3, - 0xcf, 0x69, 0x53, 0x77, 0x3e, 0x7b, 0xcc, 0xb8, 0xf3, 0xd9, 0x69, 0xae, - 0xbc, 0x2e, 0x17, 0x7f, 0xfe, 0x1f, 0x9b, 0x97, 0x53, 0xd9, 0x78, 0x3a, - 0x00, 0x00, 0x00 }; - -static const u32 bnx2_TXP_b06FwData[(0x0/4) + 1] = { 0x0 }; -static const u32 bnx2_TXP_b06FwRodata[(0x0/4) + 1] = { 0x0 }; - -static struct fw_info bnx2_txp_fw_06 = { - /* Firmware version: 4.6.16 */ - .ver_major = 0x4, - .ver_minor = 0x6, - .ver_fix = 0x10, - - .start_addr = 0x08000098, - - .text_addr = 0x08000000, - .text_len = 0x3a74, - .text_index = 0x0, - .gz_text = bnx2_TXP_b06FwText, - .gz_text_len = sizeof(bnx2_TXP_b06FwText), - - .data_addr = 0x00000000, - .data_len = 0x0, - .data_index = 0x0, - .data = bnx2_TXP_b06FwData, - - .sbss_addr = 0x08003aa0, - .sbss_len = 0x68, - .sbss_index = 0x0, - - .bss_addr = 0x08003b08, - .bss_len = 0x14c, - .bss_index = 0x0, - - .rodata_addr = 0x00000000, - .rodata_len = 0x0, - .rodata_index = 0x0, - .rodata = bnx2_TXP_b06FwRodata, -}; - /* Initialized Values for the TX Processor. */ static const struct cpu_reg cpu_reg_txp = { .mode = BNX2_TXP_CPU_MODE, @@ -4461,4 +86,3 @@ static const struct cpu_reg cpu_reg_txp = { .spad_base = BNX2_TXP_SCRATCH, .mips_view_base = 0x8000000, }; - diff --git a/drivers/net/bnx2_fw2.h b/drivers/net/bnx2_fw2.h deleted file mode 100644 index c54e4886b8bb..000000000000 --- a/drivers/net/bnx2_fw2.h +++ /dev/null @@ -1,4547 +0,0 @@ -/* bnx2_fw2.h: Broadcom NX2 network driver. - * - * Copyright (c) 2004, 2005, 2006, 2007 Broadcom Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, except as noted below. - * - * This file contains firmware data derived from proprietary unpublished - * source code, Copyright (c) 2004, 2005, 2006, 2007 Broadcom Corporation. - * - * Permission is hereby granted for the distribution of this firmware data - * in hexadecimal or equivalent format, provided this copyright notice is - * accompanying it. - */ - -static u8 bnx2_COM_b09FwText[] = { - 0xcd, 0x7c, 0x7b, 0x6c, 0x5c, 0xd7, 0x99, 0xdf, 0x77, 0xef, 0xcc, 0x90, - 0x43, 0x6a, 0x44, 0x5d, 0x32, 0x13, 0x66, 0x1c, 0x33, 0xcd, 0x3c, 0x2e, - 0x29, 0xda, 0x64, 0x92, 0x31, 0x77, 0xa4, 0xd0, 0xc9, 0xad, 0x3d, 0x99, - 0x19, 0xc9, 0x4c, 0xa8, 0x0d, 0xe8, 0x44, 0x2e, 0x52, 0x54, 0x28, 0xd8, - 0x21, 0xe5, 0x28, 0x8b, 0xec, 0xae, 0xf2, 0x28, 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bnx2_com_fw_09 = { - /* Firmware version: 4.6.15 */ - .ver_major = 0x4, - .ver_minor = 0x6, - .ver_fix = 0xf, - - .start_addr = 0x080000f8, - - .text_addr = 0x08000000, - .text_len = 0x4a7c, - .text_index = 0x0, - .gz_text = bnx2_COM_b09FwText, - .gz_text_len = sizeof(bnx2_COM_b09FwText), - - .data_addr = 0x00000000, - .data_len = 0x0, - .data_index = 0x0, - .data = bnx2_COM_b09FwData, - - .sbss_addr = 0x08004ae0, - .sbss_len = 0x38, - .sbss_index = 0x0, - - .bss_addr = 0x08004b18, - .bss_len = 0xc0, - .bss_index = 0x0, - - .rodata_addr = 0x08004a7c, - .rodata_len = 0x30, - .rodata_index = 0x0, - .rodata = bnx2_COM_b09FwRodata, -}; - -static u8 bnx2_CP_b09FwText[] = { - 0xa5, 0xbc, 0x0d, 0x74, 0x1c, 0xe5, 0x95, 0x26, 0xfc, 0x54, 0x75, 0xb7, - 0xd4, 0x92, 0x5a, 0x52, 0x49, 0x6e, 0x8b, 0x36, 0x68, 0x70, 0xb5, 0x55, - 0x2d, 0x0b, 0x4b, 0x40, 0xb5, 0x24, 0x3b, 0xed, 0x6c, 0x83, 0x3b, 0xb6, - 0x6c, 0x64, 0x63, 0x40, 0x36, 0x06, 0xc4, 0xb7, 0xfe, 0x3e, 0x7a, 0xfc, - 0x03, 0x86, 0x38, 0x19, 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0xaf, 0xd7, 0xcb, 0xff, 0x48, 0x2a, 0xf6, 0xe1, - 0xc1, 0x84, 0xac, 0x81, 0xfc, 0x1f, 0x05, 0x3f, 0x96, 0xb4, 0x1c, 0x54, - 0x00, 0x00, 0x00 }; - -static const u32 bnx2_CP_b09FwData[(0x84/4) + 1] = { - 0x00000000, 0x0000001b, 0x0000000f, 0x0000000a, 0x00000008, 0x00000006, - 0x00000005, 0x00000005, 0x00000004, 0x00000004, 0x00000003, 0x00000003, - 0x00000003, 0x00000003, 0x00000003, 0x00000002, 0x00000002, 0x00000002, - 0x00000002, 0x00000002, 0x00000002, 0x00000002, 0x00000002, 0x00000002, - 0x00000002, 0x00000002, 0x00000002, 0x00000002, 0x00000002, 0x00000002, - 0x00000001, 0x00000001, 0x00000001, 0x00000000 }; -static const u32 bnx2_CP_b09FwRodata[(0x16c/4) + 1] = { - 0x80080100, 0x80080080, 0x80080000, 0x08001800, 0x08001800, 0x08001838, - 0x08001838, 0x0800184c, 0x0800181c, 0x08001a74, 0x08001a40, 0x08001acc, - 0x08001acc, 0x08001b54, 0x08001a84, 0x80080240, 0x080021c4, 0x08002010, - 0x080021ec, 0x08002284, 0x080023d4, 0x08002420, 0x08002544, 0x0800244c, - 0x080024d0, 0x08002080, 0x080029f8, 0x0800299c, 0x0800202c, 0x0800202c, - 0x0800202c, 0x080025b8, 0x080025b8, 0x0800202c, 0x0800202c, 0x08002874, - 0x0800202c, 0x0800202c, 0x0800202c, 0x0800202c, 0x080028d4, 0x0800202c, - 0x0800202c, 0x0800202c, 0x0800202c, 0x0800202c, 0x0800202c, 0x0800202c, - 0x0800202c, 0x0800202c, 0x0800202c, 0x0800202c, 0x0800202c, 0x0800202c, - 0x0800202c, 0x08002440, 0x0800202c, 0x0800202c, 0x08002944, 0x0800202c, - 0x0800202c, 0x0800202c, 0x0800202c, 0x0800202c, 0x0800202c, 0x0800202c, - 0x0800202c, 0x0800202c, 0x0800202c, 0x0800202c, 0x0800202c, 0x0800202c, - 0x0800202c, 0x0800202c, 0x0800202c, 0x0800202c, 0x08002798, 0x0800202c, - 0x0800202c, 0x08002700, 0x0800265c, 0x080037c0, 0x08003794, 0x08003760, - 0x08003734, 0x08003714, 0x080036c8, 0x80080100, 0x80080080, 0x80080000, - 0x80080080, 0x00000000 }; - -static struct fw_info bnx2_cp_fw_09 = { - /* Firmware version: 4.6.15 */ - .ver_major = 0x4, - .ver_minor = 0x6, - .ver_fix = 0xf, - - .start_addr = 0x08000080, - - .text_addr = 0x08000000, - .text_len = 0x5418, - .text_index = 0x0, - .gz_text = bnx2_CP_b09FwText, - .gz_text_len = sizeof(bnx2_CP_b09FwText), - - .data_addr = 0x080055a0, - .data_len = 0x84, - .data_index = 0x0, - .data = bnx2_CP_b09FwData, - - .sbss_addr = 0x08005624, - .sbss_len = 0x91, - .sbss_index = 0x0, - - .bss_addr = 0x080056b8, - .bss_len = 0x19c, - .bss_index = 0x0, - - .rodata_addr = 0x08005418, - .rodata_len = 0x16c, - .rodata_index = 0x0, - .rodata = bnx2_CP_b09FwRodata, -}; - -static u8 bnx2_RXP_b09FwText[] = { - 0xec, 0x5c, 0x7d, 0x70, 0x1c, 0xe5, 0x79, 0xff, 0xbd, 0x7b, 0x7b, 0xd2, - 0x4a, 0x3a, 0x9d, 0x56, 0xa7, 0x93, 0x7c, 0x22, 0x04, 0xef, 0xa2, 0x3d, - 0xf9, 0xb0, 0x0c, 0xec, 0x9d, 0x4f, 0xb6, 0xa0, 0xdb, 0xb2, 0x83, 0x0d, - 0x11, 0x21, 0x13, 0x84, 0x4d, 0x52, 0x33, 0x49, 0x27, 0x37, 0xc6, 0x18, - 0x81, 0x4d, 0x70, 0x0d, 0x6d, 0x55, 0x86, 0x19, 0x6f, 0x2c, 0x7f, 0x01, - 0x27, 0x9d, 0x62, 0x64, 0x63, 0xd2, 0x0e, 0x68, 0x6c, 0x59, 0x08, 0x7c, - 0xd2, 0x61, 0x20, 0xad, 0xe8, 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bnx2_RXP_b09FwRodata[(0x124/4) + 1] = { - 0x5f865437, 0xe4ac62cc, 0x50103a45, 0x36621985, 0xbf14c0e8, 0x1bc27a1e, - 0x84f4b556, 0x094ea6fe, 0x7dda01e7, 0xc04d7481, 0x80080100, 0x80080080, - 0x80080000, 0x08004fbc, 0x08004fbc, 0x08005098, 0x0800506c, 0x08005050, - 0x08004f8c, 0x08004f8c, 0x08004f8c, 0x08004fc4, 0x080072ac, 0x080072f8, - 0x080072b8, 0x080071dc, 0x080072b8, 0x080072e8, 0x080072b8, 0x080071dc, - 0x080071dc, 0x080071dc, 0x080071dc, 0x080071dc, 0x080071dc, 0x080071dc, - 0x080071dc, 0x080071dc, 0x080071dc, 0x080072d8, 0x080072c8, 0x080071dc, - 0x080071dc, 0x080071dc, 0x080071dc, 0x080071dc, 0x080071dc, 0x080071dc, - 0x080071dc, 0x080071dc, 0x080071dc, 0x080071dc, 0x080071dc, 0x080072c8, - 0x0800787c, 0x08007748, 0x08007844, 0x08007748, 0x08007814, 0x08007630, - 0x08007748, 0x08007748, 0x08007748, 0x08007748, 0x08007748, 0x08007748, - 0x08007748, 0x08007748, 0x08007748, 0x08007748, 0x08007748, 0x08007748, - 0x08007770, 0x00000000 }; - -static struct fw_info bnx2_rxp_fw_09 = { - /* Firmware version: 4.6.15 */ - .ver_major = 0x4, - .ver_minor = 0x6, - .ver_fix = 0xf, - - .start_addr = 0x080031d8, - - .text_addr = 0x08000000, - .text_len = 0x78f4, - .text_index = 0x0, - .gz_text = bnx2_RXP_b09FwText, - .gz_text_len = sizeof(bnx2_RXP_b09FwText), - - .data_addr = 0x00000000, - .data_len = 0x0, - .data_index = 0x0, - .data = bnx2_RXP_b09FwData, - - .sbss_addr = 0x08007a40, - .sbss_len = 0x58, - .sbss_index = 0x0, - - .bss_addr = 0x08007a98, - .bss_len = 0x20, - .bss_index = 0x0, - - .rodata_addr = 0x080078f4, - .rodata_len = 0x124, - .rodata_index = 0x0, - .rodata = bnx2_RXP_b09FwRodata, -}; - -static u8 bnx2_xi_rv2p_proc1[] = { - /* Date: 01/27/2009 19:01 */ -#define XI_RV2P_PROC1_POST_WAIT_TIMEOUT_MSK 0xffff - 0xa5, 0x56, 0xdd, 0x6b, 0x1c, 0x55, 0x14, 0x3f, 0x33, 0xbb, 0x33, 0xb3, - 0xd9, 0x9d, 0xd9, 0x5d, 0x9a, 0x34, 0x8e, 0xb1, 0x34, 0xdb, 0x20, 0xca, - 0xa6, 0x13, 0xdd, 0x68, 0x1f, 0x04, 0x03, 0x2d, 0x01, 0x29, 0x98, 0xe2, - 0x43, 0xa0, 0x52, 0x8a, 0x60, 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0x00000001, 0x00000000 }; - -static struct fw_info bnx2_tpat_fw_09 = { - /* Firmware version: 4.6.15 */ - .ver_major = 0x4, - .ver_minor = 0x6, - .ver_fix = 0xf, - - .start_addr = 0x08000488, - - .text_addr = 0x08000400, - .text_len = 0x13a4, - .text_index = 0x0, - .gz_text = bnx2_TPAT_b09FwText, - .gz_text_len = sizeof(bnx2_TPAT_b09FwText), - - .data_addr = 0x00000000, - .data_len = 0x0, - .data_index = 0x0, - .data = bnx2_TPAT_b09FwData, - - .sbss_addr = 0x080017c0, - .sbss_len = 0x40, - .sbss_index = 0x0, - - .bss_addr = 0x08001800, - .bss_len = 0x12b4, - .bss_index = 0x0, - - .rodata_addr = 0x080017a4, - .rodata_len = 0x4, - .rodata_index = 0x0, - .rodata = bnx2_TPAT_b09FwRodata, -}; - -static u8 bnx2_TXP_b09FwText[] = { - 0xc5, 0x7b, 0x7d, 0x70, 0x1b, 0xe7, 0x79, 0xe7, 0xef, 0xc5, 0x02, 0xe4, - 0x02, 0x04, 0x41, 0x90, 0x82, 0x64, 0xf0, 0xca, 0x44, 0x58, 0x61, 0x41, - 0xc1, 0x26, 0x2d, 0x2f, 0x28, 0x50, 0x82, 0xcb, 0x55, 0x85, 0x4a, 0xb4, - 0x44, 0xc7, 0x74, 0x43, 0x3b, 0x6a, 0x4b, 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0xe7, 0x3b, 0x2b, 0x36, 0xa9, - 0xec, 0x0f, 0x0f, 0xc7, 0xd7, 0x58, 0xf9, 0xf5, 0x6f, 0x56, 0xd9, 0x3d, - 0x9a, 0x77, 0x56, 0x5d, 0x6f, 0xf7, 0xd1, 0x56, 0x45, 0xad, 0xcf, 0x33, - 0xab, 0xec, 0xfd, 0xed, 0x4f, 0x57, 0xb5, 0x5a, 0x9f, 0xe7, 0x57, 0xd9, - 0x3e, 0xf5, 0xee, 0x2a, 0xd5, 0xfa, 0xfc, 0x87, 0x55, 0x76, 0x5e, 0xbe, - 0xb4, 0x6a, 0xc9, 0xd5, 0xf7, 0x63, 0xf8, 0xef, 0xff, 0x00, 0x88, 0xf4, - 0x23, 0x6f, 0xec, 0x3a, 0x00, 0x00, 0x00 }; - -static const u32 bnx2_TXP_b09FwData[(0x0/4) + 1] = { 0x0 }; -static const u32 bnx2_TXP_b09FwRodata[(0x30/4) + 1] = { - 0x80000940, 0x80000900, 0x80080100, 0x80080080, 0x80080000, 0x800e0000, - 0x80080080, 0x80080000, 0x80000a80, 0x80000a00, 0x80000980, 0x80000900, - 0x00000000 }; - -static struct fw_info bnx2_txp_fw_09 = { - /* Firmware version: 4.6.15 */ - .ver_major = 0x4, - .ver_minor = 0x6, - .ver_fix = 0xf, - - .start_addr = 0x08000098, - - .text_addr = 0x08000000, - .text_len = 0x3ae8, - .text_index = 0x0, - .gz_text = bnx2_TXP_b09FwText, - .gz_text_len = sizeof(bnx2_TXP_b09FwText), - - .data_addr = 0x00000000, - .data_len = 0x0, - .data_index = 0x0, - .data = bnx2_TXP_b09FwData, - - .sbss_addr = 0x08003b40, - .sbss_len = 0x6c, - .sbss_index = 0x0, - - .bss_addr = 0x08003bac, - .bss_len = 0x24c, - .bss_index = 0x0, - - .rodata_addr = 0x08003ae8, - .rodata_len = 0x30, - .rodata_index = 0x0, - .rodata = bnx2_TXP_b09FwRodata, -}; - diff --git a/firmware/Makefile b/firmware/Makefile index e6c0fd1cf9ab..1dfcd02051e2 100644 --- a/firmware/Makefile +++ b/firmware/Makefile @@ -32,6 +32,10 @@ fw-shipped-$(CONFIG_ADAPTEC_STARFIRE) += adaptec/starfire_rx.bin \ adaptec/starfire_tx.bin fw-shipped-$(CONFIG_ATARI_DSP56K) += dsp56k/bootstrap.bin fw-shipped-$(CONFIG_ATM_AMBASSADOR) += atmsar11.fw +fw-shipped-$(CONFIG_BNX2) += bnx2/bnx2-mips-09-4.6.17.fw \ + bnx2/bnx2-rv2p-09-4.6.15.fw \ + bnx2/bnx2-mips-06-4.6.16.fw \ + bnx2/bnx2-rv2p-06-4.6.16.fw fw-shipped-$(CONFIG_CASSINI) += sun/cassini.bin fw-shipped-$(CONFIG_COMPUTONE) += intelliport2.bin fw-shipped-$(CONFIG_CHELSIO_T3) += cxgb3/t3b_psram-1.1.0.bin \ diff --git a/firmware/WHENCE b/firmware/WHENCE index 1b340c11ef0d..f3d015115034 100644 --- a/firmware/WHENCE +++ b/firmware/WHENCE @@ -553,3 +553,23 @@ Licence: Unknown Found in hex form in kernel source. -------------------------------------------------------------------------- + +Driver: BNX2 - Broadcom NetXtremeII + +File: bnx2/bnx2-mips-06-4.6.16.fw +File: bnx2/bnx2-rv2p-06-4.6.16.fw +File: bnx2/bnx2-mips-09-4.6.17.fw +File: bnx2/bnx2-rv2p-09-4.6.15.fw + +Licence: + + This file contains firmware data derived from proprietary unpublished + source code, Copyright (c) 2004 - 2009 Broadcom Corporation. + + Permission is hereby granted for the distribution of this firmware data + in hexadecimal or equivalent format, provided this copyright notice is + accompanying it. + +Found in hex form in kernel source. + +-------------------------------------------------------------------------- diff --git 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