drivers/reset: add isp reset support!

drivers/reset: modify reset-starfive-jh7100.c

dts/satrfive: add isp resst support!

Signed-off-by: changhuang.liang <changhuang.liang@starfivetech.com>

5 files changed, 107 insertions, 1 deletions

diff --git a/arch/riscv/boot/dts/starfive/jh7100.dtsi b/arch/riscv/boot/dts/starfive/jh7100.dtsi
index a2f7b6f38900..0a54deea8420 100755
--- a/arch/riscv/boot/dts/starfive/jh7100.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7100.dtsi
@@ -11,6 +11,7 @@
 #include <dt-bindings/clock/starfive-jh7100-isp.h>
 #include <dt-bindings/reset/starfive-jh7100.h>
 #include <dt-bindings/reset/starfive-jh7100-audio.h>
+#include <dt-bindings/reset/starfive-jh7100-isp.h>
 
 / {
 	compatible = "starfive,jh7100";
@@ -436,6 +437,12 @@
 			#clock-cells = <1>;
 		};
 
+		isprst: reset-controller@19820000 {
+			compatible = "starfive,jh7100-isprst";
+			reg = <0x0 0x19820000 0x0 0x10000>;
+			#reset-cells = <1>;
+		};
+
 		vpu_enc: vpu_enc@118e0000 {
 			compatible = "cm,cm521-vpu";
 			reg = <0x0 0x118e0000 0x0 0x4000>;
diff --git a/drivers/reset/starfive/Kconfig b/drivers/reset/starfive/Kconfig
index e058b84a9047..c4f190a72e13 100755
--- a/drivers/reset/starfive/Kconfig
+++ b/drivers/reset/starfive/Kconfig
@@ -12,4 +12,10 @@ config RESET_STARFIVE_JH7100_AUDIO
 	depends on RESET_STARFIVE_JH7100
 	default SOC_STARFIVE_VIC7100
 	help
-	  This enables the audio reset driver for the StarFive JH7100 SoC.
\ No newline at end of file
+	  This enables the audio reset driver for the StarFive JH7100 SoC.
+config RESET_STARFIVE_JH7100_ISP
+	tristate "StarFive JH7100 Isp Reset Driver"
+	depends on RESET_STARFIVE_JH7100
+	default SOC_STARFIVE
+	help
+	  This enables the isp reset driver for the StarFive JH7100 SoC.
diff --git a/drivers/reset/starfive/Makefile b/drivers/reset/starfive/Makefile
index d3a55a75dd0f..59214d1404a7 100644
--- a/drivers/reset/starfive/Makefile
+++ b/drivers/reset/starfive/Makefile
@@ -1,3 +1,4 @@
 # SPDX-License-Identifier: GPL-2.0
 obj-$(CONFIG_RESET_STARFIVE_JH7100)		+= reset-starfive-jh7100.o
 obj-$(CONFIG_RESET_STARFIVE_JH7100_AUDIO)	+= reset-starfive-jh7100-audio.o
+obj-$(CONFIG_RESET_STARFIVE_JH7100_ISP)	+= reset-starfive-jh7100-isp.o
diff --git a/drivers/reset/starfive/reset-starfive-jh7100-isp.c b/drivers/reset/starfive/reset-starfive-jh7100-isp.c
new file mode 100644
index 000000000000..11761f1b068c
--- /dev/null
+++ b/drivers/reset/starfive/reset-starfive-jh7100-isp.c
@@ -0,0 +1,58 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Isp reset driver for the StarFive JH7100 SoC
+ *
+ * Copyright (C) 2021 Emil Renner Berthing <kernel@esmil.dk>
+ * Copyright (C) 2021 Hal Feng <hal.feng@starfivetech.com>
+ */
+
+#include <linux/mod_devicetable.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/reset-controller.h>
+
+#include <dt-bindings/reset/starfive-jh7100-isp.h>
+
+#include "reset-starfive-jh7100.h"
+
+/* register offsets */
+#define JH7100_ISPRST_ASSERT0	0x00
+#define JH7100_ISPRST_STATUS0	0x04
+
+/*
+ * Writing a 1 to the n'th bit of the ASSERT register asserts
+ * line n, and writing a 0 deasserts the same line.
+ * Most reset lines have their status inverted so a 0 bit in the STATUS
+ * register means the line is asserted and a 1 means it's deasserted. A few
+ * lines don't though, so store the expected value of the status registers when
+ * all lines are asserted.
+ */
+static const u32 jh7100_isprst_asserted[1] = {
+	0,
+};
+
+static int jh7100_isprst_probe(struct platform_device *pdev)
+{
+	return reset_starfive_jh7100_generic_probe(pdev, jh7100_isprst_asserted,
+						   JH7100_ISPRST_STATUS0, JH7100_ISPRSTN_END);
+}
+
+static const struct of_device_id jh7100_isprst_dt_ids[] = {
+	{ .compatible = "starfive,jh7100-isprst" },
+	{ /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, jh7100_isprst_dt_ids);
+
+static struct platform_driver jh7100_isprst_driver = {
+	.probe = jh7100_isprst_probe,
+	.driver = {
+		.name = "jh7100-reset-isp",
+		.of_match_table = jh7100_isprst_dt_ids,
+	},
+};
+module_platform_driver(jh7100_isprst_driver);
+
+MODULE_AUTHOR("Emil Renner Berthing");
+MODULE_AUTHOR("Hal Feng");
+MODULE_DESCRIPTION("StarFive JH7100 isp reset driver");
+MODULE_LICENSE("GPL");
diff --git a/include/dt-bindings/reset/starfive-jh7100-isp.h b/include/dt-bindings/reset/starfive-jh7100-isp.h
new file mode 100644
index 000000000000..c8bbe3034486
--- /dev/null
+++ b/include/dt-bindings/reset/starfive-jh7100-isp.h
@@ -0,0 +1,34 @@
+/* SPDX-License-Identifier: GPL-2.0 OR MIT */
+/*
+ * Copyright (C) 2021 Emil Renner Berthing
+ * Copyright (C) 2021 Hal Feng
+ */
+
+#ifndef __DT_BINDINGS_RESET_STARFIVE_JH7100_ISP_H__
+#define __DT_BINDINGS_RESET_STARFIVE_JH7100_ISP_H__
+
+#define JH7100_ISPRSTN_SYS_CLK    0
+#define JH7100_ISPRSTN_PCLK    1
+#define JH7100_ISPRSTN_SYS_CLK_1    2
+#define JH7100_ISPRSTN_PIXEL_CLK_IF0    3
+#define JH7100_ISPRSTN_PIXEL_CLK_IF1    4
+#define JH7100_ISPRSTN_PIXEL_CLK_IF2    5
+#define JH7100_ISPRSTN_PIXEL_CLK_IF3    6
+#define JH7100_ISPRSTN_PIXEL_CLK_IF10    7
+#define JH7100_ISPRSTN_PIXEL_CLK_IF11    8
+#define JH7100_ISPRSTN_PIXEL_CLK_IF12    9
+#define JH7100_ISPRSTN_PIXEL_CLK_IF13    10
+#define JH7100_ISPRST_ISP_0    11
+#define JH7100_ISPRST_ISP_1    12
+#define JH7100_ISPRST_P_AXIRD    13
+#define JH7100_ISPRST_P_AXIWR    14
+#define JH7100_ISPRST_P_ISP0    15
+#define JH7100_ISPRST_P_ISP1    16
+#define JH7100_ISPRST_DPHY_HW_RSTN    17
+#define JH7100_ISPRST_DPHY_RST09_ALWY_ON    18
+#define JH7100_ISPRST_C_ISP0    19
+#define JH7100_ISPRST_C_ISP1    20
+
+#define JH7100_ISPRSTN_END		21
+
+#endif /* __DT_BINDINGS_RESET_STARFIVE_JH7100_ISP_H__ */